Toshiba Memory Corporation

Shunsuke Kasashima

Jun Nishimura

Ayako Kawanishi

Ayaha Hachisuga

Hisashi Harada

Takamitsu Ochi

A semiconductor memory device according to an embodiment includes: a substrate; a plurality of first gate electrodes; a first semiconductor film facing the plurality of first gate electrodes; and a first gate insulating film provided between the plurality of first gate electrodes and the first semiconductor film. Moreover, this semiconductor memory device includes: a plurality of second gate electrodes; a second semiconductor film facing the plurality of second gate electrodes; and a second gate insulating film provided between the plurality of second gate electrodes and the second semiconductor film. Moreover, this semiconductor memory device includes: a third gate electrode that is provided between the plurality of first gate electrodes and the plurality of second gate electrodes, and extends in a second direction; and a third gate insulating film provided between the third gate electrode and the first semiconductor film. Moreover, a thickness in a first direction of the third gate insulating film is larger than a width in the second direction of the first gate insulating film and the second gate insulating film.

Semiconductor memory device having vertical semiconductor films with narrowing widths and gate insulating films with different thickness

A semiconductor memory device according to an embodiment includes: a substrate; a plurality of first gate electrodes; a first semiconductor film facing the plurality of first gate electrodes; a first gate insulating film provided between the plurality of first gate electrodes and the first semiconductor film; a plurality of second gate electrodes that are further from the substrate than the plurality of first gate electrodes; a second semiconductor film facing the plurality of second gate electrodes; a second gate insulating film provided between the plurality of second gate electrodes and the second semiconductor film; a third gate electrode provided between the plurality of first gate electrodes and the plurality of second gate electrodes; a third semiconductor film facing the third gate electrode; and a third gate insulating film provided between the third gate electrode and the third semiconductor film, a width in a second direction of the third semiconductor film being larger than that of a one end of the second semiconductor film, and smaller than that of the other end of the first semiconductor film.

Growing community of inventors

Yokkaichi, Japan

Shunsuke Kasashima