Panasonic Intellectual Property Management Co., Ltd.

Panasonic Corporation

Matsushita Electric Industrial Co., Ltd.

Shunsuke Isono

Sanshiro Shishido

Takeyoshi Tokuhara

Hidenari Kanehara

Akio Nakajun

Tetsuya Ueda

Yuuko Tomekawa

Masayuki Takase

Ryota Sakaida

Tatsunori Momose

Kenji Taki

Tetsuo Satake

Takashi Hyakushima

An electronic device includes: a capacitor; an insulating layer; at least one trench provided in the insulating layer; and a first conductive plug, at least part of which is surrounded by the insulating layer. The capacitor includes: a first lower electrode provided along an inner wall of the at least one trench, a dielectric layer provided on the first lower electrode, and an upper electrode provided on the dielectric layer. At least part of the first conductive plug is positioned between an upper surface of the insulating layer and a lowermost portion of the at least one trench.

Imaging device

An electronic device includes: a capacitor; an insulating layer; at feast one trench provided in the insulating layer; and a first conductive plug, at least part of which is surrounded by the insulating layer. The capacitor includes: a first lower electrode provided along an inner wall of the at least one trench, a dielectric layer provided on the first lower electrode, and an upper electrode provided on the dielectric layer. At least part of the first conductive plug is positioned between an upper surface of the insulating layer and a lowermost portion of the at least one trench.

Electronic device

An imaging device including: a semiconductor substrate including a pixel region and a peripheral region; an insulating layer that covers the pixel and peripheral regions; first electrodes located on the insulating layer above the pixel region; a photoelectric conversion layer that covers the first electrodes; a second electrode that covers the photoelectric conversion layer; detection circuitry configured to be electrically connected to the first electrodes; peripheral circuitry configured to be electrically connected to the detection circuitry, and including analog circuitry; and a third electrode electrically connected to the second electrode. The third electrode overlaps the analog circuitry in a plan view, and in all cross-sections perpendicular to a surface of the semiconductor substrate, parallel to the column direction or the row direction, intersecting at least one of the first electrodes, and intersecting the third electrode, no transistor of the digital circuitry is located directly below the third electrode.

An imaging device includes: pixels that are disposed in a row direction and a column direction and that include a first pixel and a second pixel adjacent to the first pixel along the row direction; a shield electrode located between the first pixel and the second pixel; a first shield via that extends from the shield electrode. The first pixel includes: a first photoelectric conversion layer that converts incident light to generate charge; and a first pixel electrode that collects the charge generated thereby. The second pixel includes: a second photoelectric conversion layer that converts incident light to generate charge; and a second pixel electrode that collects the charge generated thereby. The shield electrode is electrically isolated from the first pixel electrode and the second pixel electrode, and the first shield via is located between the first pixel electrode and the second pixel electrode in a plan view.

An imaging device including a semiconductor substrate having a pixel region where pixels are arranged and a peripheral region adjacent to the pixel region; an insulating layer that covers the pixel region and the peripheral region; a first electrode that is located on the insulating layer above the pixel region; a photoelectric conversion layer that covers the first electrode; and a first layer that covers the photoelectric conversion layer, the first layer being located above the pixel region and the peripheral region. The thickness of the first layer above the peripheral region is larger than a thickness of the first layer above the pixel region, and a level of an uppermost surface of the first layer above the peripheral region is higher than a level of an uppermost surface of the first layer above the pixel region.

An imaging device including a semiconductor substrate including a pixel region and a peripheral region; an insulating layer covering the pixel and peripheral regions; first electrodes located on the insulating layer above the pixel region; a photoelectric conversion layer covering the first electrodes; a second electrode that covers the photoelectric conversion layer; detection circuitry electrically connected to the first electrodes; peripheral circuitry electrically connected to the detection circuitry, and; and a third electrode located on the insulating layer. The second electrode includes a connection region in which the second electrode is connected to third electrode, the connection region overlaps analog circuitry in a plan view, and in any cross-sections perpendicular to a surface of the semiconductor substrate and parallel to a column or row direction and that intersects at least one of the first electrodes, the digital circuitry includes no transistor that is located directly below the connection region.

An imaging device includes a pixel, the pixel including a photoelectric converter which converts light into a signal charge and a charge detection circuit which detects the signal charge. The photoelectric converter includes a photoelectric conversion layer having a first surface and a second surface opposite to the first surface, a pixel electrode on the first surface, a first electrode adjacent to the pixel electrode on the first surface, the first electrode being electrically conductive to the photoelectric conversion layer, and a counter electrode on the second surface, the counter electrode facing the pixel electrode and the first electrode. A shortest distance between the pixel electrode and the first electrode in a plan view is smaller than a shortest distance between the pixel electrode and the first electrode.

Imaging device having a pixel electrode overlapping a discharge electrode and associated camera system

An imaging device includes: a semiconductor substrate including a pixel region in which pixels are arranged and a peripheral region adjacent to the pixel region; an insulating layer that covers the pixel region and the peripheral region; a first electrode located on the insulating layer above the pixel region; a photoelectric conversion layer that covers the first electrode; a second electrode that covers the photoelectric conversion layer; detection circuitry located in the pixel region and connected to the first electrode; peripheral circuitry located in the peripheral region and connected to the detection circuitry; and a third electrode located on the insulating layer above the peripheral region. The second electrode extends above the peripheral region, and the second electrode includes a connection region in which the second electrode is connected to the third electrode, the connection region overlapping the peripheral circuitry in plan view.

An imaging device includes a semiconductor substrate that includes a pixel region where pixels are arranged and a peripheral region adjacent to the pixel region; an insulating layer that covers the pixel region and the peripheral region; a first electrode that is located on the insulating layer above the pixel region; a photoelectric conversion layer that covers the first electrode; a second electrode that covers the photoelectric conversion layer; and a first layer that covers the second electrode, the first layer being located above the pixel region and the peripheral region. A thickness of the first layer above the peripheral region is larger than a thickness of the first layer above the pixel region. A level of an uppermost surface of the first layer above the peripheral region is higher than a level of an uppermost surface of the first layer above the pixel region.

A solid-state imaging device according to the present disclosure includes: a pixel region which includes: pixel plugs formed above and electrically connected to a charge accumulation and diffusion layer, the pixel plugs respectively corresponding to pixels; lower pixel electrodes formed on and electrically connected to the pixel plugs, respectively, the lower pixel electrodes respectively corresponding to the pixels; an organic photoelectric conversion film formed on and electrically connected to the lower pixel electrodes; and an upper pixel electrode formed on and electrically connected to the organic photoelectric conversion film, and in which top surfaces of a global interconnect, a light shielding film, and a first AI pad formed in an uppermost layer of a multilayer interconnect structure disposed in a peripheral region is above a bottom surface of the organic photoelectric conversion film, the peripheral region being peripheral to the pixel region.

Solid-state imaging device and method of manufacturing the same

An insulating layer is layered above a substrate, and a plurality of pixel electrodes are formed above the insulating layer in a matrix with intervals therebetween. A photoelectric conversion layer and an opposing electrode are formed in respective order above the pixel electrodes. A dummy layer is formed above the insulating layer in a region that in plan-view is more peripheral than a pixel region in which the pixel electrodes are formed. The dummy layer is formed from the same material as the pixel electrodes. The dummy layer is composed of a plurality of dummy layer portions that are each equal to each of the pixel electrodes in terms of size in plan-view. The dummy layer functions as a support layer for planarization during polishing by chemical mechanical polishing.

Solid-state imaging apparatus and method for manufacturing same

In a method for fabricating a semiconductor device, first, a first metal interconnect is formed in an interconnect formation region, and a second metal interconnect is formed in a seal ring region. Subsequently, by chemical mechanical polishing or etching, the upper portions of the first metal interconnect and the second metal interconnect are recessed to form recesses. A second insulating film filling the recesses is then formed above a substrate, and the upper portion of the second insulating film is planarized. Next, a hole and a trench are formed to extend halfway through the second insulating film, and ashing and polymer removal are performed. Subsequently to this, the hole and the trench are allowed to reach the first metal interconnect and the second metal interconnect.

Semiconductor device and method for fabricating the same

A method for fabricating a semiconductor device includes the steps of: (a) forming a first insulating film having moisture absorbency on a substrate; (b) forming a dummy contact hole and a contact hole in the first insulating film; (c) heat-treating the substrate, thereby removing water contained in the first insulating film; and (d) forming a contact and a dummy contact. The heat treatment in the step (c) removes water contained in the first insulating film through the contact hole and the dummy contact hole.

Growing community of inventors

Osaka, Japan

Shunsuke Isono