Semiconductor Energy Laboratory Co., Ltd.

Other

Sharp Kabushiki Kaisha Corporation

Ricoh Company, Ltd.

Eastman-kodak Company

Takasago International Corporation

Shunpei Yamazaki

Jun Koyama

Yasuyuki Arai

Yoshiharu Hirakata

Toru Takayama

Hisashi Ohtani

Junichiro Sakata

Hajime Kimura

Yasuhiko Takemura

Satoshi Seo

Kengo Akimoto

Junichi Koezuka

Hideaki Kuwabara

Kenichi Okazaki

Masayuki Sakakura

Kiyoshi Kato

Hideomi Suzawa

Satoshi Teramoto

Koichiro Tanaka

Akiharu Miyanaga

Masashi Tsubuku

Mitsuaki Osame

Hiroyuki Miyake

Hidekazu Miyairi

Takeshi Fukunaga

Masahiko Hayakawa

Satoshi Murakami

Masaaki Hiroki

Toshimitsu Konuma

Toshiji Hamatani

Hongyong Zhang

Yukinori Shima

Hideto Ohnuma

Masami Jintyou

Akira Mase

Junya Maruyama

Hideki Uochi

Toshinari Sasaki

Hiroki Ohara

Kei Takahashi

Takeshi Nishi

Yoshiaki Oikawa

Atsuo Isobe

Kosei Noda

Hiromichi Godo

Masahiro Takahashi

Naoto Kusumoto

Kensuke Yoshizumi

Setsuo Nakajima

Takayuki Ikeda

Akihisa Shimomura

Hisao Ikeda

Osamu Nakamura

Koji Kusunoki

Koji Dairiki

Yasuhiro Jinbo

Aya Anzai

Shinya Sasagawa

Daisuke Matsubayashi

Hiroki Adachi

Tetsuhiro Tanaka

Tatsuya Honda

Yoshiyuki Kurokawa

Yoshifumi Tanada

Shingo Eguchi

Koji Ono

Daisuke Kubota

Yuugo Goto

Tatsuya Arao

Yu Yamazaki

Tatsuya Onuki

Nobuharu Ohsawa

Kouhei Toyotaka

Takeshi Osada

Hideaki Shishido

Atsushi Umezaki

Motomu Kurata

Ryoji Nomura

Takanori Matsuzaki

Yasuo Nakamura

Kazunori Watanabe

Yutaka Shionoiri

Susumu Kawashima

Yuta Endo

Yukio Tanaka

Shuhei Nagatsuka

Tomoaki Atsumi

Tetsuji Ishitani

Junpei Momo

Ryota Tajima

Kunihiko Suzuki

Harue Osaka

Tetsuji Yamaguchi

Hideko Inoue

Satoko Shitagaki

Yoshiyuki Kobayashi

Munehiro Kozuma

Hidekazu Takahashi

Tsunenori Suzuki

Hiroyuki Ogawa

An authentication system for an electronic device with a high security level is provided. The authentication system includes a data retention means that accumulates first data related to a state of the electronic device being used by a first user registered in advance and generates a first data group, a first authentication means that authenticates a second user operating the electronic device as the first user and releases a locked state, a data acquisition means that acquires second data related to a state of the electronic device being used by the second user in a state where the locked state is released, and a second authentication means that authenticates the second user as the first user on the basis of the first data group and the second data and sets the electronic device to the locked state when the second user is not authenticated. The data retention means has a function of deleting the oldest first data of the plurality of pieces of the first data included in the first data group.

Authentication system for electronic device

A battery control circuit with a novel structure, a battery protection circuit with a novel structure, and a power storage device including either of the battery circuits are provided. The power storage device includes a first circuit portion, a second circuit portion, a third circuit portion, and a secondary battery; the first circuit portion has a function of controlling charging of the secondary battery; the first circuit portion has a function of supplying the start time and the end time of the charging of the secondary battery to the third circuit portion; the second circuit portion has functions of generating a first voltage and a first current and supplying them to the third circuit portion; the third circuit portion has a function of generating a second voltage by charging the first current in a capacitor; and the third circuit portion has a function of comparing the first voltage and the second voltage.

Power storage device and method for operating power storage device

The semiconductor device includes a first conductor and a second conductor; a first insulator to a third insulator; and a first oxide to a third oxide. The first conductor is disposed to be exposed from a top surface of the first insulator. The first oxide is disposed over the first insulator and the first conductor. A first opening reaching the first conductor is provided in the first oxide. The second oxide is disposed over the first oxide. The second oxide comprises a first region, a second region, and a third region positioned between the first region and the second region. The third oxide is disposed over the second oxide. The second insulator is disposed over the third oxide. The second conductor is disposed over the second insulator. The third insulator is disposed to cover the first region and the second region and to be in contact with the top surface of the first insulator.

Semiconductor device

A semiconductor device with high reliability is provided by the following steps: forming an oxide semiconductor; forming a first insulator in contact with the oxide semiconductor; forming a second insulator over the first insulator; forming a third insulator over the second insulator; forming an opening in the third insulator, the second insulator, and the first insulator; cleaning the inside of the opening; embedding a conductor in the cleaned opening; forming the first insulator to include an excess-oxygen region; forming the second insulator to have a higher barrier property against oxygen, hydrogen, or water than the first insulator; and processing the opening to have a cylindrical shape or an inverted cone shape.

Semiconductor device and method for manufacturing semiconductor device

To provide an electronic device capable of a variety of display. To provide an electronic device capable of being operated in a variety of ways. An electronic device includes a display device and first to third surfaces. The first surface includes a region in contact with the second surface, the second surface includes a region in contact with the third surface, and the first surface includes a region opposite to the third surface. The display device includes first to third display regions. The first display region includes a region overlapping with the first surface, the second display region includes a region overlapping with the second surface, and the third display region includes a region overlapping with the third surface. The first display region has a larger area than the third display region.

Electronic device and driving method thereof

A novel metal oxide is provided. The metal oxide has a plurality of energy gaps, and includes a first region having a high energy level of a conduction band minimum and a second region having an energy level of a conduction band minimum lower than that of the first region. The second region comprises more carriers than the first region. A difference between the energy level of the conduction band minimum of the first region and the energy level of the conduction band minimum of the second region is 0.2 eV or more. The energy gap of the first region is greater than or equal to 3.3 eV and less than or equal to 4.0 eV and the energy gap of the second region is greater than or equal to 2.2 eV and less than or equal to 2.9 eV.

Metal oxide and semiconductor device

A glass substrate is reused. The mass productivity of a semiconductor device is increased. A glass substrate one surface of which includes a first material and a second material. The first material includes one or both of a metal and a metal oxide. The second material includes one or both of a resin and a decomposition product of a resin. A cleaning method of a glass substrate, which includes a step of preparing the glass substrate one surface of which includes a first material and a second material and a step of exposing the first material by removing at least part of the second material.

Cleaning method of glass substrate, manufacturing method of semiconductor device, and glass substrate

A novel display apparatus that is highly convenient, useful, or reliable is provided. The display apparatus includes a first pixel set, a second pixel set, a first conductive film, and a second conductive film; the first pixel set includes a first light-emitting device set and a first pixel circuit set; the first pixel circuit set includes a first group of pixel circuits; and the first group of pixel circuits include a first pixel circuit. The second pixel set includes a second light-emitting device set and a second pixel circuit set; the second light-emitting device set is electrically connected to the second pixel circuit set; the second pixel circuit set includes a second group of pixel circuits; and the second group of pixel circuits include a second pixel circuit. The first conductive film is electrically connected to the first group of pixel circuits and the second group of pixel circuits, and the second conductive film is electrically connected to the first pixel circuit and the second pixel circuit.

Display apparatus having pixel sets including light-emitting devices

A semiconductor device having favorable electrical characteristics is provided. The semiconductor device includes a transistor including a gate electrode, a source electrode, and a drain electrode; a first insulator over the transistor; a second insulator over the first insulator; a third insulator over the second insulator; a first electrode in contact with the top surface of the source electrode; and a second electrode in contact with the top surface of the drain electrode. The second insulator includes a first opening portion overlapping with the source electrode and a second opening portion overlapping with the drain electrode. The third insulator is in contact with the side surface of the second insulator and the top surface of the first insulator inside the first opening portion and the second opening portion. The first electrode is positioned through the first opening portion. The second electrode is positioned through the second opening portion.

A semiconductor device having a novel structure is provided. The semiconductor device includes a p-channel transistor and an n-channel transistor provided over a silicon substrate. One of a source and a drain of the p-channel transistor is electrically connected to a first power supply line, one of a source and a drain of the n-channel transistor is electrically connected to a second power supply line, and the other of the source and the drain of the p-channel transistor is connected to the other of the source and the drain of the n-channel transistor. The p-channel transistor includes a first gate electrode and a first back gate electrode provided to face the first gate electrode with a first channel formation region therebetween. The first back gate electrode is formed using a region where an impurity element imparting conductivity is selectively introduced to the silicon substrate. The n-channel transistor is provided above a layer including the p-channel transistor.

A multifunctional imaging device is provided. The imaging device includes first to fourth light-receiving elements and first and second functional layers. The first to fourth light-receiving elements are photoelectric conversion elements having sensitivity to light of different wavelengths from each other. The first and second functional layers each include first and second transistors. The first functional layer and the fourth to first light-receiving elements are stacked in this order over the second functional layer. In each of the first to fourth light-receiving elements, a first conductive layer, a first buffer layer, a photoelectric conversion layer, a second buffer layer, and a second conductive layer are stacked in this order. The photoelectric conversion layer includes an organic compound, and the first buffer layer and the second buffer layer each include a metal or an organic compound. The first transistor is electrically connected to the first conductive layer of any of the first to fourth light-receiving elements. The second transistor is electrically connected to the first transistor.

Imaging device

An object of the present invention is to provide a semiconductor device having a novel structure in which in a data storing time, stored data can be stored even when power is not supplied, and there is no limitation on the number of writing. A semiconductor device includes a first transistor including a first source electrode and a first drain electrode; a first channel formation region for which an oxide semiconductor material is used and to which the first source electrode and the first drain electrode are electrically connected; a first gate insulating layer over the first channel formation region; and a first gate electrode over the first gate insulating layer. One of the first source electrode and the first drain electrode of the first transistor and one electrode of a capacitor are electrically connected to each other.

A transistor in which a short-channel effect is not substantially caused and which has switching characteristics even in the case where the channel length is short is provided. Further, a highly integrated semiconductor device including the transistor is provided. A short-channel effect which is caused in a transistor including silicon is not substantially caused in the transistor including an oxide semiconductor film. The channel length of the transistor including the oxide semiconductor film is greater than or equal to 5 nm and less than 60 nm, and the channel width thereof is greater than or equal to 5 nm and less than 200 nm. At this time, the channel width is made 0.5 to 10 times as large as the channel length.

To provide a semiconductor device with a novel structure. The semiconductor device includes an accelerator. The accelerator includes a first memory circuit, a second memory circuit, and an arithmetic circuit. The first memory circuit includes a first transistor. The second memory circuit includes a second transistor. Each of the first transistor and the second transistor includes a semiconductor layer including a metal oxide in a channel formation region. The arithmetic circuit includes a third transistor. The third transistor includes a semiconductor layer including silicon in a channel formation region. The first transistor and the second transistor are provided in different layers. The layer including the first transistor is provided over a layer including the third transistor. The layer including the second transistor is provided over the layer including the first transistor. The data retention characteristics of the first memory circuit are different from those of the second memory circuit.

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Tokyo, Japan

Shunpei Yamazaki