Fuji Xerox Co., Ltd.

Fujifilm Business Innovation Corp.

Shunji Tsunashima

Nobukazu Miyoshi

Terutake Hayashi

Kenichi Takahashi

Kazuo Hayashi

Hiroyuki Oyabu

Shingo Nakanishi

An information processing apparatus includes a detection unit that detects a connection of an arithmetic device, a specifying unit that specifies an arithmetic operation capable of being performed by the arithmetic device, a transfer unit that transfers data used in the arithmetic operation to the arithmetic device in a case where the specified arithmetic operation is determined to be performed by the information processing apparatus before the connection, and an acquisition unit that acquires a result obtained by the arithmetic device performing the arithmetic operation using the data.

Information processing apparatus and non-transitory computer readable medium storing program to perform arithmetic operation by using connected arithmetic device

An information processing device includes an information processing device body, an extension device to be additionally connected to the information processing device body, and a combined information generator that generates combined information to be used for displaying, on one screen, information indicating a basic function of the information processing device body together with information indicating an extended function of the extension device when the extension device is connected to the information processing device body.

Information processing device, image forming device, and non-transitory computer readable medium

An information processing apparatus includes a processor configured to acquire an additional processing program for performing additional processing in response to a connection of an additional processing apparatus configured to perform the additional processing for a function of the information processing apparatus, and store the acquired additional processing program in the information processing apparatus.

Information processing apparatus and non-transitory computer readable medium for acquiring and storing additional processing program

An information processing apparatus includes a memory and a processor. The processor is configured to: when an extension device that extends functions of the information processing apparatus by being connected to the information processing apparatus is connected to the information processing apparatus, display (i) information representing a basic function provided in the information processing apparatus and (ii) information representing an extended function added by the extension device on one screen together; and when the connection with the extension device is released, display the information representing the extended function so as to indicate that the extended function becomes available when the extension device is connected to the information processing apparatus.

Information processing apparatus and non-transitory computer readable medium information processing apparatus and non-transitory computer readable medium for providing information regarding availability of a function performed by a device upon disconnection of the device from the information processing apparatus

An integrated circuit includes a first signal line, a first circuit, a second signal line, and an attaching circuit. A first signal is transferred via the first signal line. The first circuit is connected to the first signal line and performs image processing upon the first signal being transferred thereto. The second signal line is connected to the first signal line, and a second signal indicating that the first signal has been transferred is transferred via the second signal line. The attaching circuit is connected to the second signal line and attaches, upon the second signal being transferred thereto via the second signal line, information corresponding to the second signal to an image resulting from the image processing performed by the first circuit.

Integrated circuit, image processing apparatus, and image processing method

An image processing apparatus includes multiple image processing units and multiple execution controllers. The multiple image processing units respectively perform different types of image processing operations executable on image data. The multiple execution controllers each perform control to select and run grouped image processing units of the multiple image processing units. Each of the multiple execution controllers selects and runs the grouped image processing units in accordance with a corresponding one of rules that are specified for the respective execution controllers, and one of the multiple execution controllers is used in a series of image processing operations performed on the image data.

Image processing apparatus and image forming apparatus

An integrated circuit includes IP (Intellectual Property) cores and intermediary circuits. The intermediary circuits are each connected to one IP core among the IP cores, and relay, using an NoC (Network On Chip) scheme, packets transmitted/received between the IP cores. The intermediary circuits are connected to each other. Each of the intermediary circuits replaces, when the intermediary circuit has received flow-control packets which are each transmitted from one IP core to another IP core in order to notify the other IP core of free-space information of a data buffer which the one IF core has, in a case where destinations of the flow-control packets are the same IP core, the flow-control packets with one flow-control packet including the free-space information included in the flow-control packets, and transmits the one flow-control packet to the IP core which is the destination.

Integrated circuit and electronic device

An image forming apparatus includes: a first holding unit that holds a pixel value data sequence in which each of the data sequences is formed by a pixel value and a range of the pixel value or by the pixel value, the range of the pixel value, reference to a pixel, and a range of the reference; a second holding unit that holds a transparency data sequence in which each of the one-dimensional data sequences is formed by a coefficient representing transparency of a pixel in the image element and a range of the coefficient or by the coefficient, the range of the coefficient, reference to coefficient, and a range of the reference; and an image generation unit that forms an image from the pixel value data sequence, and that generates information about transparency of the image from the transparency data sequence.

Image processing apparatus and computer readable medium

An image processing apparatus includes: an accepting unit that accepts image information about each of a plurality of image elements to be synthesized; a comparing unit that compares a threshold value with a mixing ratio used in an operation to synthesize the image information according to a given mixing ratio; and a setting unit that sets an attribute of an image element in an area where the plurality of image elements are overlapped with each other synthesized according to a comparison result obtained by the comparing unit.

Growing community of inventors

Kanagawa, Japan

Shunji Tsunashima