Fujitsu Corporation

Canon Kabushiki Kaisha

Other

Fujitsu Limited Kabushiki Kaisha Toshiba

Shunji Nakamura

Yohji Tomoyuki

Kimio Nakahata

Junji Araya

Tsutomu Toyono

Yasumasa Ohtsuka

Hatsuo Tajima

Akira Hayakawa

Kouichi Okuda

Daizo Fukuzawa

Atsushi Hosoi

Fumitaka Kan

Hidemi Egami

Junichiro Kanbe

Yasuyuki Tamura

Tohru Takahashi

Noribumi Koitabashi

Masanobu Saito

Hiromitsu Hirabayashi

Toshio Miyamoto

Hiroki Kisu

Yoshiaki Fukuzumi

Yasushi Sato

Akiyoshi Hatada

Hidenobu Suzuki

Hiroyuki Adachi

Masahiro Goto

Kazuo Kishino

Masashi Shima

Nobuhiro Hayashi

Kozo Arao

Yosuke Shimamune

Nagao Hosono

Toshiaki Yagasaki

Eiji Yoshida

Mitsuru Kurata

Atsuyoshi Abe

Yukihiro Ohzeki

Tetsuo Saito

Koichi Okuda

Takashi Soya

Katsuhiko Nishimura

Eihiro Sakaki

Tatsunori Ishiyama

Manabu Takano

Yoshimasa Kimura

Toshio Yoshimoto

Kenji Nagata

Haruhisa Honda

Yoshiki Sakuma

Yoji Tomoyuki

Masatoshi Fukuda

Tsunenori Yamauchi

Fumitaka Aoki

Kano Tanaka

Toshiro Matsui

Tomoko Nanbu

Hirokazu Ikenoue

Toshihiko Yamanaka

Kazuotshi Shimada

Tetsuji Ueno

A movable device simultaneously enabling reduction of size down to the submicron level, higher speed operation, a streamlined production process, low costs, and greater reliability. A movable device provided with bottom electrodes and a basic conductive layer fixed to a substrate, an elastic shaft of a carbon nanotube with a bottom end fixed on the basic conductive layer and standing up, and a top structure including a top electrode spaced away from the bottom electrode and fixed to a top end of the elastic shaft, wherein when applying voltage between a bottom electrode and the top electrode, the top electrode displaces relatively to the bottom electrodes within an allowable range of elastic deformation of the elastic shaft.

Movable device

The semiconductor device has a semiconductor substrate, gate electrodes formed above the semiconductor substrate, and a pair of impurity diffusion layers formed in a surface layer of the semiconductor substrate at both sides of each of the gate electrodes. The semiconductor device also has drift layers formed in the surface layer of the semiconductor substrate between the gate electrodes and one of the impurity diffusion layers as a same conduction type as the impurity diffusion layers. The gate electrodes are made of metal including aluminum, and each is formed in an overhang shape. The semiconductor device can provide an LDMOS transistor enhanced in maximum transmission frequency and power gain and capable of a high-frequency operation with high efficiency as a basic element of a high-frequency power amplifier.

Semiconductor device for high frequency uses and manufacturing method of the same

A semiconductor device comprises: a lower contact electrode; an adhesion improving layerformed on the lower contact electrode; and a capacitor including a lower electrodein a projected structure formed on the adhesion improving layer, a capacitor dielectric filmformed on the lower electrode, and an upper electrodeformed on the capacitor dielectric film, in which a gap is formed on a sidewall of the adhesion improving layer. The gap is at least partially left as a cavity. The gap insulates the upper electrodeand the adhesion improving layerby the cavity

Semiconductor device and method for fabricating the same

A semiconductor memory device comprises a silicon layer having a first diffused region and a second diffused region formed therein, a gate electrode formed through an insulating film on one side of the silicon layer between the first and the second diffused regions, a capacitor formed on said one side of the silicon layer and having a storage electrode connected to the first diffused region, and a bit line formed on the other side of the silicon layer and connected to the second diffused region, whereby a semiconductor memory device of SOI structure can be easily fabricated. The bit line connected to the second diffused region is formed on the other side of the semiconductor layer, whereby the bit line can be arranged without restriction by the structure, etc. of the capacitor. Short circuit between the capacitor and the bit line can be prevented.

Semiconductor memory device and method for fabricating the same

The semiconductor device comprises: an insulation filmformed over a silicon substrate, an insulation filmformed on the insulation filmand having opening, and conductorformed at least in the opening. Cavityhaving the peripheral edges conformed to a configuration of the openingis formed in the insulation film. The cavityis formed in the region between the electrodes or the regions between the interconnection layers so as to decrease the dielectric constant between the electrodes or between the interconnection layers, whereby the parasitic capacitances of the region between the electrodes or the region between the interconnection layers can be drastically decreased, and consequently the semiconductor device can have higher speed.

Method for fabricating a semiconductor device

A semiconductor memory device comprises a silicon layer having a first diffused region and a second diffused region formed therein, a gate electrode formed through an insulating film on one side of the silicon layer between the first and the second diffused regions, a capacitor formed on said one side of the silicon layer and having a storage electrode connected to the first diffused region, and a bit line formed on the other side of the silicon layer and connected to the second diffused region, whereby a semiconductor memory device of SOI structure can be easily fabricated. The bit line connected to the second diffused region is formed on the other side of the semiconductor layer, whereby the bit line can be arranged without restriction by the structure, etc. Of the capacitor. Short circuit between the capacitor and the bit line can be prevented.

A high-speed, low-power-consumption semiconductor device has a thin-film Si layer with a source/drain formed therein. The thin-film Si layer is curved from a region directly below a gate electrode toward a region near the source/drain. The curved thin-film Si layer develops strains in a channel region disposed directly below the gate electrode sandwiched by the source/drain in the thin-film Si layer, for thereby increasing a carrier mobility. A cavity is defined below the curved thin-film Si layer for reducing a parasitic capacitance due to a pn junction.

Semiconductor device and method of manufacturing same

A capacitorcomprises a lower electrodeformed on a substrate, an upper electrodeopposed to the lower electrode, and a capacitor dielectric filmformed between the lower electrode and the upper electrode, in which at least one of the lower electrode and the upper electrodes is an electrode of a metal substituted layer. The lower electrodes of polysilicon are formed, and then after the high-temperature heat processing for improving film quality of the capacitor dielectric film has been performed, the lower electrodes of polysilicon is substituted with aluminum to form the lower electrodes of aluminum, whereby aluminum, which cannot withstand the heat processing for improving film quality of the capacitor dielectric film can be used as a material of the lower electrodes. Thus, capacitors having good high-speed response can be formed.

Capacitor and method for fabricating the same and semiconductor device

The anti-fuse comprises a substitutable layer, an interconnection layerconnected to the substitutable layer, and the interconnection layer contains metal atoms which can be substituted with constituent atoms of the substitutable layer. The anti-fuse can be changed from the non-conduction state to the conduction state at a relatively low temperature of 300&#xb0; C. to 600&#xb0; C., and by application of not so intense laser beams, the anti-fuse can be changed from the non-conduction state to the conduction state. The anti-fuse can be changed from the non-conduction state to the conduction state by using an inexpensive equipment, which can realize decrease of fabrication costs and accordingly inexpensive semiconductor devices can be provided.

Anti-fuse and method for writing information into the anti-fuse

The semiconductor device including a memory cell region and a peripheral circuit region on a semiconductor substratecomprises a transfer transistor formed in the memory cell region, a capacitor constituted by a storage electrodeconnected to one of diffused layersof the transfer transistor and formed of a first conducting layer, a dielectric filmcovering a sidewall of the storage electrode, and an opposed electrodeformed on the dielectric film; a conducting plug formed of the first conducting layer and connected to the peripheral circuit region of the semiconductor substrate; and a first interconnectionelectrically connected to the conducting plug

A method of manufacturing a semiconductor device including the steps of: (a) forming an interlayer insulating film over a semiconductor substrate; (b) forming a first mask on the interlayer insulating film, the first mask having a plurality of stripe patterns parallel to a first direction, and etching the interlayer insulating film from a surface thereof to a first intermediate depth to form a groove; and (c) forming a second mask on the interlayer insulating film, the second mask having a plurality of stripe patterns parallel to a second direction crossing the first direction, and etching the interlayer insulating film by a remaining thickness thereof in an area corresponding to the groove and not covered with the second mask to form an opening, and in an area other than the area corresponding to the groove to form a second groove reaching a second intermediate depth from a surface of the interlayer insulating film. With this method, an opening having different cross sectional shapes at different depths can be formed with a smaller number of masks.

Semiconductor device with wiring embedded in trenches and vias

A method for fabricating a semiconductor device including a step of forming an interconnection having the upper surface covered with an insulation film on a base substrate, a step of sequentially depositing an insulation film and an insulation film on the base substrate with the interconnection formed on, a step of etching the insulation film with the insulation film as a stopper to form openings in a region containing a region where the interconnection is formed, and the step of etching the insulation film in the opening to form sidewall insulation films of the insulation film on the side walls of the interconnection and to form contact holes to be connected to the base substrate in alignment with the interconnection.

A semiconductor device includes a channel layer, a gate electrode formed on the channel layer, a p-type source region formed on a first side of the channel layer, and a p-type drain region formed on a second side of the channel layer. A heavy-hole band and a light-hole band are separated by compressive strain applied isotropically in an in-plane direction in the channel layer. A channel direction connecting the p-type source and drain regions is set substantially to a direction to maximize hole mobility in the channel layer.

Semiconductor device and complementary semiconductor device

Growing community of inventors

Kawasaki, Japan

Shunji Nakamura