Shindengen Electric Manufacturing Company Limited

Shunichi Nakamura

Akihiko Sugai

Tetsuto Inoue

Yusuke Maeyama

Yoshiyuki Watanabe

Akihiko Shibukawa

Atsushi Ogasawara

Yusuke Fukuda

Ryohei Osawa

Takashi Mochizuki

Jin Onuki

Teppei Takahashi

A wide gap semiconductor device has a wide gap semiconductor layer; and a metal electrodedisposed on the wide gap semiconductor layer. The metal electrodehas a monocrystalline layerhaving a hexagonal close-packed (HCP) structure in an interface region between the metal electrodeand the wide gap semiconductor layer. The monocrystalline layerhas a specific element-containing regioncontaining O, S, P or Se.

Wide gap semiconductor device

A wide gap semiconductor device has: a drift layer using wide gap semiconductor material being a first conductivity type; a well region being a second conductivity type and provided in the drift layer; a source region provided in the well region; a gate contact region provided in the well region and electrically connected to a gate pad; and a Zener diode region provided in the well region and provided between the source region and the gate contact region.

Wide-gap semiconductor device

A semiconductor device has: a semiconductor substrate; a drift layer of a first conductivity type; a well region of a second conductivity type; a high-concentration region of the second conductivity type, a source region of the first conductivity type; an insulating film provided on the drift layer; a first contact metal film in contact with the source region and the high-concentration region through a first opening provided in the insulating film; and a second contact metal film formed on a surface of the first contact metal film and contacting the high-concentration region through a second opening provided in the first contact metal film; a source electrode film formed on a surface of a contact metal layer including the first contact metal film and the second contact metal film. The first contact metal film includes titanium nitride, and the second contact metal film includes titanium.

Method of manufacturing semiconductor device and semiconductor device

A wide gap semiconductor device has: a drift layerusing a first conductivity type wide gap semiconductor material; a well region, being a second conductivity type and provided in the drift layer; a polysilicon layerprovided on the well region; an interlayer insulating filmprovided on the polysilicon layer; a gate padprovided on the interlayer insulating film; and a source padelectrically connected to the polysilicon layer

A wide gap semiconductor device has: a first MOSFET region (M) having a first gate electrodeand a first source regionprovided in a first well regionmade of a second conductivity type; a second MOSFET region (M) provided below a gate padand having a second gate electrodeand a second source regionprovided in a second well regionmade of the second conductivity type; and a built-in diode region electrically connected to the second gate electrode. The second source regionof the second MOSFET region (M) is electrically connected to the gate pad

A wide gap semiconductor device has: a drift layerusing wide gap semiconductor material being a first conductivity type; a plurality of well regionsbeing a second conductivity type and formed in the drift layer; a polysilicon layerprovided on the well regionsand on the drift layerbetween the well regions; an interlayer insulating filmprovided on the polysilicon layer; a gate padprovided on the interlayer insulating film; and a source padelectrically connected to the polysilicon layer

A semiconductor device includes: a drift layer of a first conductivity type which is made of silicon carbide; a junction region formed on one main surface of the drift layer; a junction termination extended region of the drift layer, the junction termination extended region being formed outside the junction region when the one main surface is viewed in plan view, and the junction termination extended region containing an impurity of a second conductivity type opposite to the first conductivity type; and a guard ring region of the drift layer, the guard ring region being formed at a position overlapping the junction termination extended region when the one main surface is viewed in plan view, and the guard ring region containing the impurity of the second conductivity type with a concentration that is higher than that of the junction termination extended region, wherein in the junction termination extended region, the concentration of the impurity of the second conductivity type in a depth direction from the one main surface increases from the one main surface down to a first depth, and the concentration of the impurity of the second conductivity type at the one main surface is one tenth or less the concentration of the impurity of the second conductivity type at the first depth and is higher than a concentration of an impurity of the first conductivity type of the drift layer.

Semiconductor device and semiconductor device manufacturing method

A silicon carbide semiconductor device includes: n type regions formed on a surface of the ntype epitaxial layer; p type body regions formed at positions deeper than the n type regions; ptype channel regions each reaching the p type body region; and ntype source regions formed toward the p type body region from the front surface side of the epitaxial layer, and the ptype channel regions and the ntype source regions are formed at a planar position where the n type region remains between the ptype channel region and the ntype source region, and out of boundary surfaces which are formed between the ptype channel region and the n type regions, the boundary surface on an outer peripheral side is positioned inside an outer peripheral surfaceof the p type body region as viewed in a plan view.

Silicon carbide semiconductor device and method of manufacturing the same

A silicon carbide semiconductor device includes: n type regions formed on a surface of the n&#x2212; type epitaxial layer; p type body regions formed at positions deeper than the n type regions; p&#x2212; type channel regions each reaching the p type body region; and n++ type source regions formed toward the p type body region from the front surface side of the epitaxial layer, and the p&#x2212; type channel regions and the n++ type source regions are formed at a planar position where the n type region remains between the p&#x2212; type channel region and the n++ type source region, and out of boundary surfaces which are formed between the p&#x2212; type channel region and the n type regions, the boundary surface on an outer peripheral side is positioned inside an outer peripheral surfaceof the p type body region as viewed in a plan view.

Method of manufacturing a silicon carbide semiconductor device

A method of manufacturing a silicon carbide semiconductor device includes, in order: polishing a silicon carbide semiconductor base body from a second main surface side thus forming unevenness on a second main surface; forming a thin metal film made of metal capable of forming a metal carbide on the second main surface of the silicon carbide semiconductor base body; irradiating a laser beam which falls within a visible region or within an infrared region to the thin metal film so as to heat the thin metal film thus forming a metal carbide on a boundary face between the silicon carbide semiconductor base body and the thin metal film; etching a metal containing byproduct layer possibly formed on a surface side of the metal carbide by a non-oxidizing chemical solution thus exposing a surface of the metal carbide; and forming a cathode electrode on the metal carbide.

Method of manufacturing silicon carbide semiconductor device and silicon carbide semiconductor device

A wide gap semiconductor device comprises a first conductive-type semiconductor layer (); a second conductive-type region (), () that is provided on the first conductive-type semiconductor layer (); a first electrode (), of which a part is disposed on the second conductive-type region (), () and the other part is disposed on the first conductive-type semiconductor layer (); an insulating layer (), (), () that is provided adjacent to the first electrode () on the first conductive-type semiconductor layer () and that extends to an end part of the wide gap semiconductor device; and a second electrode () that is provided between the first electrode () and the end part of the wide gap semiconductor device and that forms a schottky junction with the first conductive-type semiconductor layer ().

Wide gap semiconductor device and method of manufacturing the same

A semiconductor device includes an element portion and a gate pad portion on the same wide gap semiconductor substrate. The element portion includes a first trench structure having a plurality of first protective trenches and first buried layers formed deeper than gate trenches. The gate pad portion includes a second trench structure having a plurality of second protective trenches and second buried layers. The second trench structure is either one of a structure where the second trench structure includes: a p-type second semiconductor region and a second buried layer made of a conductor or a structure where the second trench structure includes a second buried layer formed of a metal layer which forms a Schottky contact. The second buried layer is electrically connected with the source electrode layer.

Semiconductor device and method of manufacturing semiconductor device

A silicon carbide semiconductor device includes a silicon carbide layerof a first conductivity type, a silicon carbide layerof a second conductivity type, a gate trench, a gate electrodeprovided in the gate trench, and a protection trenchformed to a depth greater than the gate trench. A region in the horizontal direction that includes both the gate trenchand a protection trenchthat surrounds the gate trenchwith at least a part of the gate trenchleft unenclosed is a cell region, and a region in the horizontal direction that includes a protection trenchand in which a gate pador a lead electrode connected to the gate pad is disposed is a gate region.

Silicon carbide semiconductor device, method of manufacturing silicon carbide semiconductor device and method of designing silicon carbide semiconductor device

A silicon carbide semiconductor device includes a silicon carbide layerof a first conductivity type, a silicon carbide layerof a second conductivity type, a gate trench, a gate electrodeprovided in the gate trench, and a protection trenchformed to a greater depth than the gate trench. A region in the horizontal direction that includes both the gate trenchand a protection trenchthat surrounds only a part of the gate trenchin the horizontal direction is a cell region, and a region in the horizontal direction that includes a protection trenchand in which a gate pador a lead electrode connected to the gate padis disposed is a gate region.

A method for manufacturing a semiconductor device includes forming a thermal oxide film on one surface of an SiC substrate by thermal oxidation at a temperature of 1150&#xb0; C. or above in a gas atmosphere including nitrogen and oxygen, and introducing highly-concentrated nitrogen to one surface of the SiC substrate while forming the thermal oxide film; forming a highly-concentrated n-type SiC layer on one surface of the SiC substrate such that the thermal oxide film is removed from one surface of the SiC substrate by etching and, thereafter, one surface of the SiC substrate is exposed to radicals so that Si&#x2014;N bonded bodies and C&#x2014;N bonded bodies on one surface of the SiC substrate are removed while leaving nitrogen introduced into a lattice of SiC out of highly-concentrated nitrogen introduced into one surface of the SiC substrate; and forming an ohmic electrode layer on one surface of the SiC substrate.

Method for manufacturing silicon carbide (SiC) semiconductor device by introducing nitrogen concentration of 5X1019 cm-3 or more at a boundary surface between thermal oxide film and the SiC substrate and then removing the thermal oxide film

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Saitama, Japan

Shunichi Nakamura