Thine Electronics, Inc.

Canon Kabushiki Kaisha

Olympus Optical Company, Ltd.

Shunichi Kubo

Satoshi Miura

Yusuke Fujita

Takao Aoki

Eiichi Kondo

Yoshinobu Oshima

Takayuki Suzuki

Shuhei Yamamoto

Tetsuya Iizuka

Hidejiro Kadowaki

Mitsutoshi Sugawara

Masashi Suda

Shunzo Inoue

Kunihiro Asada

Naoki Iwami

Tetsuji Tachika

Akihiro Moto

Yuji Gendai

Yoshimichi Murakami

Yohei Ishizone

Masao Shionoya

Akihiro Tomosada

Masaki Mitarai

A reference current source includes a reference current path, a first output current path and a second output current path. The reference current path includes a diode-connected first transistor, a diode-connected second transistor, and a first resistor that are connected in series between a first fixed potential and a second fixed potential. The first output current path includes a third transistor having a gate connected to a gate of the second transistor, forming a current mirror together with the second transistor, and a second resistor interposed between the third transistor and the first fixed potential. The second output current path includes a voltage-current conversion circuit to which a potential of a third node between the third transistor and the second resistor in the first output current path is applied and through which a reference current flows.

Reference current source

One embodiment relates to a transmitting device, a receiving device, and the like for preventing increases in the number of communication links, power consumption, and circuit layout area. The transmitting device includes a high-speed signal generator, a low-speed signal generator, and a signal superimposing unit. The high-speed signal generator generates a high-speed signal having a limited frequency band. The low-speed signal generator generates a low-speed signal having a frequency lower than the frequency band of the high-speed signal. The signal superimposing unit outputs a superimposed signal of the high-speed signal and the low-speed signal. The receiving device includes a signal separator and a recovery unit. The signal separator separates the received signal into the high-speed signal and the low-speed signal. The recovery unit performs frequency tracking based on the separated low-speed signal and performs phase tracking based on the separated high-speed signal.

Transmitting device, receiving device, repeating device, and transmission/reception system

Provided is a voltage-controlled oscillator capable of suppressing performance deterioration due to a leak current of a variable capacitive element. Each of the first capacitive circuit and the second capacitive circuit includes a variable capacitive element, a capacitive element, a detection circuit, and a compensation circuit. The variable capacitive element is provided between nodes. A capacitance value of variable capacitive element depends on a voltage value between the nodes. The detection circuit applies a bias voltage value to the second node, and detects an amount of leak current flowing through the variable capacitive element. The compensation circuit causes a current for compensating for the leak current of the variable capacitive element to flow through the first node on the basis of a detection result of the detection circuit.

Voltage-controlled oscillator, PLL circuit, and CDR device

A PLL frequency synthesizer includes a voltage controlled oscillator that outputs an oscillation signal having a frequency corresponding to a control voltage value, a phase comparison unit that outputs a phase difference signal representing a phase difference between a feedback oscillation signal and a reference oscillation signal, a charge pump that outputs a charge and discharge current according to the phase difference, a loop filter that outputs the control voltage value, which is increased or decreased according to a charge and discharge amount of a capacitive element, to the voltage controlled oscillator, a detection unit that detects a change rate of the control voltage value, and a control unit that adjusts the charge and discharge current, a characteristic of the loop filter, or a characteristic of the voltage controlled oscillator based on a detection result of the detection unit.

PLL frequency synthesizer

A PLL circuit of one embodiment has a structure for preferably setting the FV characteristic of an LC-VCO. The PLL circuit includes a voltage controlled oscillator, a phase comparator, a charge pump, a loop filter, and an FV characteristic adjustment unit setting the FV characteristic. The voltage controlled oscillator has an FV characteristic indicating the relationship between a control signal and a frequency and outputs an oscillation signal having a frequency corresponding to the control signal based on the FV characteristic. The phase comparator detects a phase difference between an input signal and the control signal. The charge pump outputs a corrected voltage value changed according to the phase difference. The loop filter outputs a control voltage value changed in response to corrected voltage value variations. The FV characteristic adjustment unit generates an FV characteristic control signal by a mean corrected voltage value.

PLL circuit

A PLL circuit includes a phase comparator, a charge pump, a loop filter, a voltage controlled oscillator, a frequency divider, and a phase compensator. The loop filterincludes a resistor, a first capacitance element, and a second capacitance element. The phase compensatoris provided in parallel to the charge pumpand adds a differentiation term to an open-loop transfer function. The phase compensatorincludes a bufferreceiving a phase difference signal output from the phase comparator and a third capacitance elementprovided between an output terminal of the bufferand an input terminal of the loop filter

PLL circuit and CDR apparatus

The signal multiplexerinputs two selection signals CLK&#x3c;&#x3e;, CLK&#x3c;&#x3e; that sequentially reach significant levels, inputs two input signals IN&#x3c;&#x3e;, IN&#x3c;&#x3e;, and outputs, from an output terminal, a signal OUT that depends on an m-th input signal IN&#x3c;m&#x3e; of the two input signals when an m-th selection signal CLK&#x3c;m&#x3e; of the two selection signals is at the significant level. The signal multiplexerincludes a resistance unitand two drive units. Each of the drive unitsincludes a driving switch, a selecting switch, and a potential stabilizing switch. When one of the selecting switchand the potential stabilizing switchin each of the drive unitsis in a closed state, the other is in an open state.

Signal multiplexer

A semiconductor device includes a first circuitand a second circuitthat are connected in series, a first terminal Tthat applies a first potential to a first power supply line DLof the first circuit, a second terminal Tthat applies a second potential to a second power supply line DLof the second circuit, a third terminal Tthat is connected to a signal transfer line of the first circuit, and a protection circuit that is connected to the third terminal T, and discharges a current from the third terminal Tto a fourth terminal Twhen a potential of the third terminal Tbecomes higher than a first threshold value. The first power supply line DLand the second power supply line DLare separated, and the fourth terminal Tis not directly connected to the first power supply line DLand is electrically connected to a lead.

Semiconductor device

A serializer device () includes a first latch unit (), a second latch unit (), a conversion unit (), a frequency division unit (), a load signal generation unit (), a phase difference detection unit (), and a reset instruction unit (), and has a simple configuration and can reduce a bit error rate at an early stage. The phase difference detection unit () detects a phase difference between a first clock (CLK) applied to the first latch unit () and a third clock (CLK) applied to the second latch unit (). The reset instruction unit () outputs a reset instruction signal (RSTn) to the frequency division unit () when the phase difference is not within a target range.

Serializer device

A receiving deviceincludes a voltage controlled oscillator, a sampling unit, a control voltage generating unit, an error detecting unit, and a control voltage holding unit. The control voltage holding unitholds a value of a control voltage Vc output from the control voltage generating unit. When the error detecting unitdetects an error of a digital signal, a control voltage held before error detection is provided to the voltage controlled oscillator

Receiving device

A clock data recovery devicegenerates a recovered clock Recovered Clock and recovered data Recovered Data based on an input signal Data In, and includes a signal selector, a phase delay unit, a time measurement unit, a phase selector, an edge detector, a polarity detector, a logic inverter, and a data output unit. The signal selector, the phase delay unit, the time measurement unit, and the phase selectorconstitute a clock-generation deviceA. The phase delay unitincludes a plurality of cascaded delay elementsto. The phase selectorselects a signal output from the delay element in a position corresponding to a unit interval time among the delay elementsto, and outputs the signal as a feedback clock Feedback Clock.

Clock-generating device and clock data recovery device

An apparatus develops an electrostatic latent image formed on an image carrier by attaching a developing agent containing toners, thereby converting the latent image into a toner image, transfers the toner image on a sheet, and fixes the toner image, thereby recording an image. The developing agent consists of a first magnetic toner containing less than 45 wt. % of a magnetic powder and having a comparatively low magnetism and low charge amount, and a second magnetic toner which has almost the same particle diameter as that of the first magnetic toner and charge characteristics of the same polarity as that of the first magnetic toner, contains 45 wt. % or more of a magnetic powder, and has a comparatively high magnetism and low charge amount. The first and second magnetic toners are mixed with a formulating proportion of 20 to 99 parts by weight and 1 to 80 parts by weight, respectively. The apparatus includes a convey mechanism for conveying the developing agent to the image carrier with a magnetism.

Magnetic developing agent and electrophotographic apparatus using said

In a color image formation apparatus which comprises a photosensitive medium, optical image exposure device for exposing the photosensitive medium to an optical image having light components of an image original, and electrostatic latent image formation device for forming electrostatic latent images on the photosensitive medium in accordance with the exposure to the optical image. The image formation apparatus includes a color separating device having a plurality of color separating filters disposed along the optical path of the optical image exposure device, a developing device having a plurality of developing units for supplying different color developers to develop the electrostatic latent images formed on the photosensitive medium by the electrostatic latent image formation device, a mode setting element for designating the combination of one of the color separating filters and one of the developing units, and a control device for reading the combination of a predetermined color separating filter and a predetermined color developing unit designated by the mode setting device and for causing the designated color separating filter and the designated color developing unit to cooperate with each other.

Color image formation apparatus

An image transfer device, in which a developed image formed on an image-bearing member is transferred therefrom to a transfer medium, comprises a corona discharge device opposed to the image-bearing member for imparting corona discharge, a device for gripping the leading end edge of the transfer medium, a support extending between the corona discharge device and the image-bearing member and supporting the gripping device for circulatory movement, and an element for confining the path of the transfer medium gripped and guided by the gripping device substantially within the path of that device.

Image transfer device

In transferring a toner image carried on a toner image carrier onto a transfer medium, a uniform charge is imparted to the surface of the toner image carrier while a charge of the same polarity as the uniform charge is imparted to the surface of the transfer medium, whereafter a toner image is transferred from the surface of the toner image carrier to the surface of the transfer medium.

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Tokyo, Japan

Shunichi Kubo