Fujitsu Corporation

Fujitsu Frontech Limited

Shunichi Kikuchi

Haruhiko Yamamoto

Koji Katsuyama

Mitsuhiko Nakata

Masumi Suzuki

Kiyokazu Moriizumi

Yoshiaki Udagawa

Izumi Ono

Masahiro Suzuki

Michimasa Aoki

Minoru Hirano

Misao Umematsu

Hitoshi Nori

Hiroshi Kobayashi

Shunji Baba

Hidehiko Kira

Naoki Ishikawa

Naoaki Nakamura

Norikazu Ozaki

Kiyotaka Seyama

Mitsutaka Yamada

Mitsuo Suehiro

Yoshihisa Iwakiri

Naomi Fukunaga

Takayoshi Matsumura

Manabu Watanabe

Hideaki Yoshimura

Takashi Kanda

Junichi Ishimine

Kazuaki Satoh

Kazuhiro Nitta

Akihiko Fujisaki

Kenji Iketaki

Satoshi Osawa

Haruyuki Matsunaga

Masahiro Miyo

Tatsuro Tsuneno

Hideo Katsumi

Hiroshi Onuki

Zhiyi Song

Kouji Katsuyama

Makoto Sumiyoshi

Takami Sasahara

Naoki Yasuda

A cooling plate that includes: a plate that is attached to a heat generating element; feed flow paths and return flow paths for coolant that are alternatingly arranged along a plate face of the plate; and a plurality of coolant flow paths that are formed in a plurality of levels within the plate closer to the heat generating element than the feed flow paths and the return flow paths, the plurality of coolant flow paths placing adjacent paths of the feed flow paths and the return flow paths in parallel communication through each of the levels.

Cooling plate and information processing device

An information processing apparatus is disclosed. The information processing apparatus includes a first heat emitting device and a heat exchanger. The heat exchanger includes a first layered structure of layers of a plurality of first flow channel members having one or more first flow channels formed therein for a first coolant that is liquid, a first header in fluid communication with the first flow channel members, a second layered structure of layers of a plurality of second flow channel members having one or more second flow channels formed therein for a second coolant that is liquid, and a second header in fluid communication with the second flow channel members. The first and the second layered structures are overlapped in a first region when viewed in a layered direction, and at least one of the first and the second layered structures has space between layers in a second region.

Information processing apparatus and heat exchanger

A channel distribution type cooling plate where a space between a first coolant storage part for inflow of coolant and a second cooling storage part for outflow of coolant formed at the two ends of an upper space of a main body provided with a lower space for removing heat of a heat generating member is partitioned by a meandering type partition wall to form coolant distribution paths connected to the first coolant storage part and coolant collection paths connected to the second coolant storage part, the bottom of the coolant distribution paths and the coolant collection paths are communicated by a plurality of through holes with the lower space, and side surfaces of the partition wall at the coolant distribution path sides are formed with subchannels for running coolant from the first coolant storage part, in order to improve the cooling efficiency at the coolant outlet side.

Cooling plate and data processing system provided with cooling plates

The present invention provides an RFID tag excellent in the diffusion of heat. The RFID tag includes a base, an antenna pattern that is provided on the base and forms a communication antenna, a circuit chip that is electrically connected to the antenna pattern and performs radio communication via the antenna, a cover that is provided in close contact with the base in such a manner as to cover the antenna pattern except a prescribed region including the circuit chip, and an insulating thermal diffusion material that covers the prescribed region and is in thermal contact with the circuit chip. The insulating thermal diffusion material has thermal conductivity higher than the thermal conductivity of the cover.

RFID tag

An RFID tag including a first part which has a first base and a communication antenna formed on the first base by use of a paste of resin material mixed with metallic filler; and a second part disposed on the first part, which has a second base, a metallic patch disposed on the second base and electrically connected to the antenna on the first part, and a circuit chip connected onto the metallic patch via a bump, the circuit chip performing radio communication via the antenna.

RFID tag, module component, and RFID tag fabrication method

An IC chip mounting method which mounts two or more IC chips on a base, includes: preparing a wafer by mounting a tape on a face thereof, which is the reverse of the wafer having a mounting surface to be attached to the base, and by dividing the wafer into IC chips by dicing while leaving the tape; positioning the wafer to face the base in such a direction that the mounting surface to be attached to the base faces the base; sequentially pressing the IC chips on the wafer against the base and temporarily fixing the IC chips while the base is being fed in a prescribed one-dimensional direction along the wafer and while the wafer is being moved two-dimensionally along the base; and fixing the IC chips temporarily fixed on the base on the base by heating and pressurizing in a batch manner.

IC chip mounting method

RFID tag with thermal conductive cover

A semiconductor device includes a semiconductor bare chip and an electrically-insulative board member with a thin-film structure capacitor. The semiconductor bare chip has a power supply terminal and a grounding terminal on the back surface thereof. The semiconductor bare chip is mounted on a circuit board by flip-chip bonding. The board member includes a board and a thin-film structure capacitor provided on the board. The capacitor has terminals corresponding to the power supply terminal and the grounding terminal of the semiconductor bare chip thereon. The side of the board member where the capacitor is provided is bonded to the back surface of the semiconductor bare chip. The terminals of the capacitor are electrically connected to the power supply terminal and the grounding terminal of the semiconductor bare chip.

Semiconductor device including semiconductor bare chip mounted by flip-chip bonding, and board member with thin-film structure capacitor for semiconductor bare chip mounted by flip-chip bonding

A printed wiring board device includes circuit parts which are mounted on a wiring board and constitute parts of a circuit in the printed wiring board device. Pads are provided on the wiring board in the circumference of the circuit parts, and the pads being electrically isolated from the circuit. Heat-absorbing dummy parts are mounted on the pads, and the dummy parts absorb heat from the circuit parts through the pads during reflow soldering.

Printed wiring board device having heat-absorbing dummy parts, and method of manufacturing the printed wiring board device

A dummy pad is formed through a polyimide insulating layer so as to be provided opposite to a via connecting pad formed on the surface of a ceramic substrate. A defect occurring in the via connecting pad is filled with a protrusion when the dummy pad is formed. Accordingly, the influence of the defect upon a layer above the dummy pad is prevented. Further, in a method for manufacturing a thin film wiring board obtained by forming a thin film layer on a base substrate having a via that allows interlayer electric conduction, a void defect existing in the via is filled with a conductive material having corrosion resistance against an etchant, and then the thin film layer is formed on the base substrate.

Thin film wiring board and method for manufacturing the same, base substrate and method for manufacturing the same

A multi-layer wiring substrate includes a main substrate and a plurality of insulating films stacked on the main substrate. The plurality of insulating films have wiring patterns formed on wiring regions thereof and dummy wiring patterns formed on peripheral regions of the wiring regions. The wiring patterns include signal wiring patterns, power supply wiring patterns, and vias. The dummy wiring patterns correspond to the wiring patterns, respectively.

Multi-layer wiring substrate

A multilayer thin-film wiring board including a base material provided with a plurality of wiring layers and an insulating layer laminated on the base material, and including a via formed by laminating the wiring layers so as to be provide through the insulating layer. A plurality of branching vias are provided by forming a plurality of branches in one of the wiring layers forming the via, the plurality of branching vias being placed along a direction of extension of the base material. The plurality of branching vias are joined to the one of the plurality of wiring layers which is placed at a position closest to the base material.

Multilayer thin-film wiring board

There is provided an I/O pin by which an MCM is positively prevented from being damaged by solder flowing from the fore end to the base of the I/O pin when the I/O pin is soldered in the case of mounting the MCM. An I/O pin used for an electrical connection is provided, one end of which is perpendicularly fixed to an MCM and the other end of which is soldered to a predetermined position on the mother board in the case of mounting the MCM on the mother board. In an intermediate portion of the I/O pin, there is formed a solder dam composed of a plated layer of Ni of low solder wettability, a layer of highly heat-resistant resin or a layer of high-temperature solder.

I/O pin having solder dam for connecting substrates

The thin-film multi-layer substrate includes an insulating substrate base plate, and a thin-film structure including a plurality of conducting layers and a plurality of insulating layers formed on the substrate base plate. A via structure is formed in the thin-film structure and connected to one of the conducting layers of the thin-layer structure. Pins are connected to the via structure, such that the bottom of the via structure is directly laminated on the substrate base plate, and the pins are secured onto the via structure.

Thin-film multi-layer substrate and electronic device

A heat sink structure of a module substrate includes a plurality of stripe-like bottom regions extending in a longitudinal direction and repeated in a lateral direction with a predetermined pitch, a plurality of stripe-like top regions extending in said longitudinal direction and repeated in the lateral direction with said predetermined pitch, such that the stripe-like bottom regions and the stripe-like top regions are repeated alternately in the lateral direction, wherein the stripe-like top regions and the stripe-like bottom regions have respective lateral edges that are connected with each other by cooling fins.

Heat sink structure for cooling a substrate and an electronic apparatus

Growing community of inventors

Kawasaki, Japan

Shunichi Kikuchi