Seiko Epson Corporation

Shun Oshita

Kenyou Nagao

Nobuyuki Saito

Kuniaki Matsuda

Yoshiyuki Kamihara

Shinsuke Kubota

Shuichi Yanagihara

Yuji Mikami

Takuya Ishida

Shoichiro Kasahara

Hiroaki Shimono

A data transfer control device for transferring data via a bus includes a buffer controller for controlling access to a data buffer in which a command block area, a data area and status block area are prepared, and a transfer controller for controlling data transfer. The transfer controller executes, a transaction of bulk OUT transfer in a command transport to automatically send a packet including command block data written in the command block area in response to an instruction to execute automatic bulk transfer, a transaction of one of bulk OUT transfer and bulk IN transfer in a data transport to automatically execute one of sending a packet including sending data written in the data area and receiving a packet including receiving data to be written in the data area, and a transaction of bulk IN transfer in a status transport to automatically receive a packet including status block data to be written in the status block area.

Bulk data transfer and buffer control device and electronic instrument

A data transfer control device for data transfer through a bus including a state execution circuit conducting each state process of first-Nth states in order to perform a state control of the data transfer control device, a transfer controller performing a control for the data transfer based on a result of the state process execution in the state execution circuit, a command register in which a state transition execution command is set, and a control circuit decoding the state transition execution command set in the command register and controlling the state execution circuit based on a result of the decoding, the control circuit controlling the state execution circuit to execute a Kth (1&#x2266;K&#x2266;N) state process if an individual state transition execution command that changes the state of the data transfer control device to the Kth state is set in the command register, and the control circuit controlling the state execution circuit to execute a plurality of state processes consecutively from a Lth (1&#x2266;L&#x2266;N) state to a Mth (1&#x2266;M&#x2266;N) state if a successive transition execution command is set in the command register, the successive transition execution command successively changing the state of the data transfer control device from the Lth state to the Mth state.

Data transfer control device with state transition control and electronic equipment

A data transfer control device having: a hub dedicated data storage section which stores a packet transferred between the data transfer control device and a hub; a packet transmission section which cyclically issues a token packet to the hub for asking whether the state of the hub has changed or not; a packet reception section which receives a response packet sent from the hub in response to the token packet; and a transfer controller which writes the response packet received by the packet reception section into the hub dedicated data storage section, and generates an interrupt which indicates that the state of the hub has changed.

Data transfer control device, electronic instrument, and data transfer control method

A transceiver includes upstream differential signal lines DPUP and DMUP, downstream differential signal lines DPDW and DMDW, common differential signal lines DPCM and DMCM, a first transmission driver of which outputs are connected to DPUP and DMUP, a second transmission driver of which outputs are connected to DPDW and DMDW, a first switch circuit which connects the first transmission driver to a logic circuit during upstream connection and connects the second transmission driver to the logic circuit during downstream connection, a second switch circuit which respectively connects DPUP and DMUP to DPCM and DMCM during the upstream connection and respectively connects DPDW and DMDW to DPCM and DMCM during the downstream connection, and a third transmission driver connected to DPCM and DMCM.

Transceiver, data transfer control device, and electronic instrument

When a first mode (with-SOF mode) has been set, data transfer is performed while SOF packets are transferred at frame periods, and when a second mode (non-SOF mode) has been set and also non-periodic (bulk) transfer is being performed, the periodic transfer of SOF packets is disabled and non-periodic data is transferred. If there is no non-periodic data to be transferred, a SOF packet is transferred in the frame period, even if the second mode has been set. During host operation with USB on-the-go (OTG), pipe regions are allocated to the packet buffer, and non-periodic data is transferred automatically to or from end points while the periodic transfer of SOF packets is disabled. When all of the automatic transfer instruction signals of the pipe regions are inactive, SOF packets are transferred periodically even if the second mode has been set.

Data transfer control device for data transfer over a bus, electronic equipment and method for data transfer over a bus

A data transfer control device for data transfer through a bus, includes: a buffer controller which controls access to a packet buffer which stores data; and a transfer controller which controls transfer of the data stored in the packet buffer. A transaction for performing data transfer with a transfer destination is issued, and when a negative acknowledgment (NAK) response to the issued transaction is returned from the transfer destination, issuance of a retransmission transaction for the NAK response is allowed after waiting for a predetermined skip timing.

A signal state detection circuit of a data transfer control device notifies a processing of results detected by a line state detection circuit or a power supply line detection circuit by using an interrupt signal. The processing sets a state command corresponding to a state of a transition destination judged based on the notified detection results in a control register of a state controller. A state command decoder decodes the state command set in the control register and generates a control signal. A signal line control circuit controls a signal state of at least one of signal lines formed of data signal lines (D+ and D&#x2212;) and power supply lines (VBUS and GND) based on the control signal.

Data transfer control device, electronic equipment and data transfer control method

A state controller of a data transfer processing circuit switches an operation of an A-device or a B-device between a host operation and a peripheral operation by state transition. A power supply switch circuit connects a power supply circuit with a VBUS line based on transition of the state controller. A power supply switching circuit of a power supply control circuit connects the VBUS line or the power supply circuit with the data transfer processing circuit based on a switching signal. The switching signal is generated based on an output signal of a switch circuit or a control signal from the state controller.

Data transfer control device, electronic equipment, and power supply switching method

When an electronic instrument Q is in normal operating mode and set to be slave, power from a rechargeable battery or an external power source is supplied to a data transfer control circuit, and when the electronic instrument Q is in charge mode and set to be slave, power from VBUS is supplied thereto to charge a rechargeable battery. When an external power source can be used in charge mode, power from the external power source is supplied to the rechargeable battery instead of from VBUS. When an electronic instrument P is in normal operating mode and set to be master, power from a rechargeable battery or an external power source is supplied to the data transfer control circuit and the electronic instrument Q; and when the electronic instrument P is in charge mode and set to be master, power from the rechargeable battery or the external power source is supplied to the electronic instrument Q through the VBUS in order to charge a rechargeable battery of the electronic instrument Q. In charge mode, the supply of power to the data transfer control circuit is either turned off or an energy-saving mode is set.

Growing community of inventors

Sapporo, Japan

Shun Oshita