Novatek Microelectronics Corp.

Shun-Hsun Yang

Chia-Wei Su

Tse-Hung Wu

Po-Hsiang Fang

Po-Yu Tseng

Hsin-Hung Lee

Jr-Ching Lin

Ching-Wen Hou

Ji-Ting Chen

Li-Tang Lin

Ying-Zu Lin

Wei-Hsiang Hung

Sou-Chieh Chang

Chia-Hsun Kuo

A method of handling signal transmission applicable to a display system includes a plurality of steps. The steps include transmitting a reset signal embedded in a first data signal to each of at least one source driver via a first data channel, generating a first control signal for setting the at least one source driver, and transmitting the first control signal embedded in a second data signal to each of the at least one source driver via a second data channel when the reset signal is transmitted via the first data channel.

Method and apparatus of handling signal transmission applicable to display system

A method of handling signal transmission applicable to a timing controller of a display system, wherein the timing controller is couplable to at least one source driver of the display system via a plurality of mini low voltage differential signaling (mini-LVDS) channels, includes transmitting a reset signal to each of the at least one source driver via a first mini-LVDS channel among the plurality of mini-LVDS channels; generating a first control signal for setting the at least one source driver; and transmitting the first control signal to each of the at least one source driver via a second mini-LVDS channel among the plurality of mini-LVDS channels when the reset signal is transmitted via the first mini-LVDS channel.

A liquid crystal display apparatus, a source driver, and a method for controlling polarity of driving signals thereof are provided. The source driver includes a signal receiving interface, a decoder, and a controller. The signal receiving interface receives an image data stream or an indication signal. The decoder obtains controlling information from the image data stream or the indication signal. The controller receives the controlling information and decides a plurality of source driving signals generated by the source driver according to the controlling information.

Liquid crystal display apparatus, source driver and method for controlling polarity of driving signals thereof

A liquid crystal display apparatus, a source driver, and a method for controlling polarity of driving signals thereof are provided. The source driver includes a signal receiving interface, a decoder, and a controller. The signal receiving interface receives an image data stream or a data input/output indication signal. The decoder obtains polarity controlling information from the image data stream or the data input/output indication signal. The controller receives the polarity controlling information and decides driving polarities of a plurality of source driving signals generated by the source driver according to the polarity controlling information.

A source driver includes a first drive channel circuit, a voltage controller and a first programmable voltage buffer unit. The first drive channel circuit receives a first pixel data and a first reference voltage group, for driving the display device. The voltage controller receives a voltage command during a line data transmitting period, a horizontal blanking period or a vertical blanking period for generating a first reference voltage configuration data. The first programmable voltage buffer unit is coupled to the voltage controller and the first drive channel circuit, and receives the first reference voltage configuration data for applying the first reference voltage group to the first drive channel circuit. Furthermore, a method for driving a display device is also provided.

Source driver and method for driving display device

A source driver and a method to reduce peak current of the source driver are provided. The source driver includes a latch circuit, a level shifter and a digital-to-analog converter (DAC) circuit. The latch circuit latches current bit-data. The latch circuit is coupled to an input terminal of the level shifter. The DAC circuit is coupled to an output terminal of the level shifter. When the current bit-data is not a complement of previous bit-data, the latch circuit selects and outputs the current bit-data to the input terminal of the level shifter, and the DAC circuit outputs a voltage corresponding to the output data of the level shifter. When the current bit-data is the complement of the previous bit-data, the latch circuit selects and outputs the previous bit-data to the input terminal of the level shifter, and the DAC circuit outputs a voltage corresponding to the current bit-data.

Source driver and method to reduce peak current therein

The present invention discloses an integrated source driver for a liquid crystal display device. The integrated source driver includes a reference voltage generating circuit, for providing a plurality of adjustable voltage ranges within a supply voltage and a ground level, and a reference voltage selecting circuit, including a plurality of digital to analog converters, for selecting and generating a plurality of internal reference voltages from the plurality of adjustable voltage ranges, respectively. The plurality of adjustable voltage ranges decrease progressively.

Integrated source driver and liquid crystal display device using the same

A timing scrambling method, for a timing control device corresponding to a plurality of source driving devices, includes adjusting a selecting signal according to a clock signal; selecting one of a plurality of scrambling generating units according to the selecting signal to generate a timing scrambling signal; and generating scrambling data for the plurality of source driving devices according to the timing scrambling signal.

Timing scrambling method and timing control circuit thereof

A self-detection charge sharing module for a liquid crystal display device is disclosed. The self-detection charge sharing module includes at least one detecting unit, for detecting a plurality of input voltages of a plurality of operational amplifiers driving a plurality of data line sand a plurality of output voltage of the plurality of data line, to generate at least one detecting result, and at least one charge sharing unit, for conducting connection between at least one first data line and at least one second data line among the plurality of data line when the at least one detecting result indicates at least one corresponding first input voltage and at least one corresponding second input voltage among the plurality of input voltage have opposite voltage variation direction and vary toward each other. The at least one first input voltage and the at least one second input voltage maintain respective polarities.

Self-detection charge sharing module

A source driver apparatus configured to drive a display panel is provided. The source driver apparatus includes a data operation circuit and a pixel driving circuit. The data operation circuit is configured to receive pixel data and perform a polarity determination operation on the pixel data to determine a polarity distribution information of pixels on the display panel. The pixel driving circuit is coupled to the data operation circuit. The pixel driving circuit is configured to drive the display panel according to the pixel data and the polarity distribution information. Furthermore, a driving method of the display panel is also provided.

Source driver apparatus and driving method of display panel

A display driver, which comprises: a first predetermined voltage level providing apparatus, for providing a first predetermined voltage level group comprising at least one first predetermined voltage level; a first image data providing apparatus, for outputting a first image data; and a detection controlling circuit, for determining if an output terminal of the first image data providing apparatus is pre-charged to the first predetermined voltage level according to a relation between an absolute value of a voltage level of the first image data and an absolute value of the first predetermined voltage level.

Display driver and display diving method

A method for displaying error rates of data channels of a display is provided. A timing controller of the display repeatedly transmits a test signal with a specific format to a first and a second source drivers of the display via a first and a second data channels of the display. During testing, a first number and a second number of times of the first source driver and the second source driver determining that the received test signal does not have the specific format are counted respectively. The first and the second source drivers control displaying of a first area and a second area of a panel of the display respectively according to the counted first and second numbers of times. Accordingly, the error rates of the data channels are presented on the panel of the display in a way that the error rates could be recognized more easily.

Method for displaying error rates of data channels of display

A source driver includes a first drive channel circuit, a voltage controller and a first programmable voltage buffer unit. The first drive channel circuit receives a first pixel data from the timing controller via a data bus, converts the first pixel data to a first drive voltage according to a first reference voltage group, and drives a display panel by the first drive voltage. The voltage controller receives a voltage command from the timing controller, generates and changes a first reference voltage configuration data according to the voltage command. The first programmable voltage buffer unit is coupled to the voltage controller and the first drive channel circuit, and receives the first reference voltage configuration data to generate and adjust the first reference voltage group for applying to the first drive channel circuit. Furthermore, a method for updating a new gamma curve by the source driver is also provided.

Source driver and method for updating a gamma curve

A timing controller is provided. The timing controller includes a timing control circuit, a first scrambler and a second scrambler. The timing control circuit provides first source driving data and second source driving data. The first scrambler scrambles the first source driving data according to a first random number to generate first scrambled data. The second scrambler scrambles the second driving source data according to a second random number to generate second scrambled data. The second random number is different from the first random number.

Growing community of inventors

Hsinchu, Taiwan

Shun-Hsun Yang