Kabushiki Kaisha Toshiba

Shuichi Kuboi

Tsukasa Nakai

Hiroyuki Fukumizu

Yasuhiro Nojiri

Tadashi Iguchi

Masao Iwase

Toru Matsuda

Akiko Nomachi

Motoya Kishida

Kenichi Ootsuka

Masanobu Baba

Masayuki Takata

According to one embodiment, a method is disclosed for manufacturing nonvolatile semiconductor memory device including forming a stacked body by alternately stacking an electrode layer and a layer-to-be-etched, and forming an oxidized layer between the layer-to-be-etched provided at least in any side of an upper side and a lower side of the electrode layer and the electrode layer. The method can include forming a groove which passes through the stacked body. The method can include embedding an insulating body within the groove. The method can include forming a hole which passes through the stacked body. The method can include selectively removing the layer-to-be-etched via the hole. The method can include forming a charge storage layer in an inner side of the hole. The method can include forming a channel body layer in an inner side of the charge storage layer.

Method for manufacturing nonvolatile semiconductor memory device

A nonvolatile semiconductor memory device includes: a first interconnect; a second interconnect at a position opposing the first interconnect; and a variable resistance layer between the first interconnect and the second interconnect, the variable resistance layer being capable of reversibly changing between a first state and a second state by a voltage applied via the first interconnect and the second interconnect or a current supplied via the first interconnect and the second interconnect, the first state having a first resistivity, the second state having a second resistivity higher than the first resistivity. Wherein the variable resistance layer has a compound of carbon and silicon as a main component and including hydrogen.

Nonvolatile semiconductor memory device

According to one embodiment, a non-volatile semiconductor memory device includes: a first line; a second line intersecting with the first line; and a memory cell arranged at a position where the second line intersects with the first line, wherein, the memory cell includes: a variable resistance element; and a negative resistance element connected in series to the variable resistance element.

Non-volatile semiconductor memory device including a variable resistance element

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Tokyo, Japan

Shuichi Kuboi