Oki Electric Industry Co., Ltd.

Oki Semiconductor Co., Ltd.

Lapis Semiconductor Co., Ltd.

Shuichi Hashidate

Mitsuya Ohie

Kyotaro Nakamura

Tetsuya Tanabe

Shinichi Fukuzako

Masahiro Miyazaki

An output buffer has a first transistor and a voltage mitigation second transistor. The first transistor is configured to generate a voltage value corresponding to the power-supply voltage in response to an input signal. The second transistor is provided between an output line and the first transistor. A gate terminal of the second transistor is applied with a power-supply bias voltage which turns the second transistor on and makes a voltage between gate and source terminals of the second transistor constant in accordance with a power-supply voltage.

Output buffer and semiconductor device

A semiconductor device includes first, second and third power supply terminals respectively supplied with first, second and third power supply voltages. The semiconductor device also includes a first terminal connectable to a host device and a second terminal connectable to a peripheral device. The semiconductor device also includes a first circuit block connected to the first terminal and the first power supply terminal and receiving data output from the host device based on the first power supply voltage, a second circuit block connected to the second terminal and the third power supply terminal and receiving data output from the peripheral device based on the third power supply voltage, and a third circuit block connected to the second power supply terminal and controlling operation of the first circuit block and the second circuit block based on the second power supply voltage.

Semiconductor device for supplying power supply voltage to semiconductor device

A micro-controller includes a USB control unit, an MC unit having an operation mode and a stop mode and an oscillating circuit, which is commonly used by the USB control unit and the MC unit. The USB control unit includes a watching circuit for watching a condition of a first data and a second data, which is complement data of the first data. The operation of the oscillating circuit is controlled in response to an operation control signal, which is generated by a watching result, and an oscillation control signal whose voltage level is changed in response to the mode of the MC unit.

Micro-controller having USB control unit, MC unit and oscillating circuit commonly used by the USB control unit and the MC unit

Semiconductor device for supplying external power supply voltages to three circuit blocks including USB controller and I/O block

A semiconductor circuit includes an integrated circuit having a backup area that is constantly powered and a power-off area that is powered off in a standby mode. A register in the power-off area stores a mask signal that is normally set to the high level but is changed to the low level before a transition to the standby mode. A latch circuit in the backup area latches the low level but not the high level of the mask signal. A masking circuit in the backup area masks input signals from the power-off area to the backup area while the latch circuit is in the latched state. Besides preventing erratic input to the backup area during normal-to-standby transitions, this arrangement prevents leakage of current from the backup area to the power-off area on the mask signal line in the standby mode.

Semiconductor circuit with mask register

A semiconductor device capable of reducing power consumption. In the semiconductor device having a plurality of data transmitter-receiver circuits using clock signals on frequencies prescribed in the unified standard as transmit/receive clock signals, an oscillator circuit and a clock generator circuit are provided for each data transmitter-receiver circuit and a supply of clock signals to the data transmitter-receiver circuits can be stopped by shutting off the power supply to the oscillator circuits and the clock generator circuits inside the plurality of data transmitter-receiver circuits individually with respect to each data transmitter-receiver circuit.

Semiconductor device to reduce power individually to each circuit

A semiconductor device includes first through third power supply terminals respectively supplied with first, second and third power supply voltages. The semiconductor device also includes a first terminal connectable to a host device, and a second terminal connectable to a peripheral device. A first circuit block is connected to the first terminal and the first power supply terminal, and receives data output from the host device based on the first power supply voltage. A second circuit block is connected to the second terminal and the third power supply terminal, and receives data output from the peripheral device based on the third power supply voltage. A third circuit block is connected to the second power supply terminal, and controls operation of the first circuit block and the second circuit block based on the second power supply voltage.

Supplying multiple voltages via three power supply terminals to a semiconductor device that is connectable to a host device and a peripheral device

A semiconductor integrated circuit is provided that achieves a lesser degree of inconsistency in the delay time of clock signals that are internally provided. An input clock signal distributed via an input clock supply path is provided to individual timing adjustments circuits. The timing adjustment circuits are each constituted by providing a wiring pattern having serial resistors and gaps in a circuit correction area. The wiring pattern of the semiconductor integrated circuit is corrected by employing a focused ion beam apparatus to achieve an adjustment so that internal input clock signals at the same phase are obtained from the individual timing adjustment circuits. Using the wiring pattern having undergone the adjustment, a semiconductor integrated circuit is manufactured as a product.

Growing community of inventors

Tokyo, Japan

Shuichi Hashidate