Industrial Technology Research Institute

Shu-Wei Wang

Chun-Kai Huang

Bor-Chuan Kuo

Lie-Der Lin

Hai-Yang Huang

Cheun-Song Lin

Wei K Chia

Kuo-Yen Fan

Chun-Chieh Hsiao

Kuo-Cheng Leu

A shared memory based network having a transferring network switch and a receiving network switch. In this network, each network switch has a stack, queues corresponding to output ports and a dared control port. The stack stores available buffer addresses of the shared memory. Each of the queues stores to-be-accessed buffer addresses of the corresponding output port. The shared control port is driven to indicate states of the shared memory based network, so that th stack of the transferring network switch is identical with the stack of the receiving network switch. The shared memory can be read by all output ports of both the transferring network switch and the receiving network switch according to their corresponding queues.

Shared memory based network switch and the network constructed with the same

A display memory architecture which efficiently stores and processes true color and index mode pixels is disclosed. The R, G and B components of true color mode pixels occupy different groups of bit planes in different banks of a frame memory. In addition, consecutive index mode pixels are located in not necessarily consecutive different groups of bit planes in consecutive banks so that a plurality of index mode pixels can be accessed simultaneously in reading and writing operations. Pixel swap circuits are used to swap the order of the R, G and B components of true color pixels and the order of simultaneously accessed index mode pixels, when the order of the accessed locations is different from the order in which R, G and B components of true color pixels or a plurality of index mode pixels are processed by a graphics processor.

Graphics memory architecture for multimode display system

A host computer, a graphics processor which receives and executes commands generated by the host computer, a display memory for storing display data, and a display device for displaying the display data are provided. A graphics context is also provided in which the parameters of a current image are stored. A processing unit for receiving and executing the graphics commands issued by the host computer and for converting the parameters stored in the graphics context into the display data, and a drawing unit for storing the display data in the display memory are also provided. Furthermore, a shared memory is provided which is directly accessible to the host computer so that it can write the parameters of a next graphics command into the shared memory while the graphics processor is executing a current command. The shared memory is also directly accessible to the graphics processor so that it can receive the parameters of the next graphics command to be executed directly from the shared memory. In a preferred embodiment, transfers of the graphics parameters between the graphics context and the shared memory are accomplished by employing a bit-block transfer method and a mask register stored in the graphics context.

Fast graphics control system capable of simultaneously storing and

Growing community of inventors

Hsinchu Hsien, Taiwan

Shu-Wei Wang