Windbond Electronics Corp.

Shu-Sen Lin

A sense amplifier capable of performing a logical NOT operation is provided, which includes a sense circuit, configured to sense a first voltage of a bit line and a second voltage of an inverse bit line; a first transistor, coupled between a first terminal of the sense circuit and the bit line; a second transistor, coupled between a second terminal of the sense circuit and the inverse bit line; and a third transistor, coupled between the bit line and the inverse bit line. First and second memory cells are respectively controlled by first and second word lines, and connected to the bit line. When the sense amplifier is in an inverse writing state, the sense amplifier writes the second voltage to the second memory cell through a predetermined path. A first logical state of the first voltage is complementary to a second logical state of the second voltage.

Memory device and sense amplifier capable of performing in-memory logical not operation and computing

A memory device capable of performing in-memory computing is provided and includes a memory cell array, a sense amplifier, a voltage control circuit, and a word line decoding circuit. The memory cell array includes memory cells arranged in a two-dimensional array. The memory cells on each row of the memory cell array are connected to a corresponding word line, and the memory cells on each column of the memory cell array are connected to a corresponding bit line. The sense amplifier detects a voltage level of the activated bit line and a voltage level of an inverse bit line corresponding to the bit line. The voltage control circuit selects a detection voltage provided to the sense amplifier according to a control signal from a memory controller. The word line decoding circuit activates a first word line and a second word line according to the control signal.

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Hsinchu County, Taiwan

Shu-Sen Lin