Au Optronics Corporation

Shu-Feng Wu

Chun-Nan Lin

Wen-Ching Tsai

Kuo-Yuan Tu

Po-Lin Chen

Chih-Chung Chuang

Shin-Jien Kuo

Chao-Yun Cheng

Wei-Sheng Yu

Yih-Chyun Kao

Chen-Yuan Tu

Shu-Wei Tsao

Chi-Jui Lin

A dual gate transistor circuit, a pixel circuit, and a gate drive circuit are provided. The dual gate transistor circuit includes a dual gate transistor, a first diode, and a second diode. The dual gate transistor has a first gate and a second gate, and the first gate receives a drive signal. The first diode is connected in series between the first gate and the second gate according to a first-polarity direction. The second diode is connected in series between the first gate and the second gate according to a second-polarity direction. The first-polarity direction is opposite to the second-polarity direction.

Dual gate transistor circuit, pixel circuit and gate drive circuit thereof

A semiconductor device and a manufacturing method thereof are provided. The semiconductor device includes a gate, a channel layer, a gate insulation layer, a source, a drain and a silicon-aluminum-oxide layer. The gate is disposed on a substrate. The channel layer is disposed on the substrate. The channel layer overlaps the gate. The gate insulation layer is disposed between the gate and the channel layer. The source and the drain are disposed on two sides of the channel layer. The silicon-aluminum-oxide layer is disposed on the substrate and covers the source, the drain and the channel layer.

Semiconductor device and manufacturing method thereof

A thin-film transistor (TFT) includes a gate electrode, a gate dielectric layer, a semiconductor layer, source/drain electrodes, a passivation layer and a protection layer. The gate electrode is disposed on a substrate. The gate dielectric layer covers the gate electrode and the substrate. The semiconductor layer is disposed on the gate dielectric layer and above the gate electrode. The semiconductor layer has a channel region disposed above the gate electrode and source/drain regions disposed at both sides of the channel region. The source/drain electrodes are disposed on the source/drain regions of the semiconductor layer and each has a barrier layer disposed on the source/drain regions of the semiconductor layer and a conductive layer disposed on the barrier layer. The passivation layer is disposed over the surface of the source/drain electrodes. The protection layer is disposed over the substrate, the passivation layer, and the channel region of the semiconductor layer.

Thin film transistor and method for manufacturing thereof

A pixel structure disposed on a substrate including a thin film transistor (TFT), a bottom capacitor electrode, a dielectric layer, an upper capacitor electrode, a passivation layer, and a pixel electrode is provided. The TFT having a source/drain and the bottom capacitor electrode are disposed on the substrate. The dielectric layer is disposed on the bottom capacitor electrode. The upper capacitor electrode has a semiconductor layer, a barrier layer, and a metal layer. The semiconductor layer is disposed on the dielectric layer above the bottom capacitor electrode. The barrier layer is disposed on the semiconductor layer. The metal layer whose material includes copper, a copper alloy, or a combination thereof is disposed on the barrier layer. The passivation layer covers the TFT and the upper capacitor electrode and has a first opening exposing the source/drain. The pixel electrode is electrically connected to the TFT through the first opening.

Pixel structure, display panel, eletro-optical apparatus, and method thererof

A display panel structure having a circuit element disposed thereon and method of manufacture are provided. The display panel includes a substrate and the circuit element disposed on the substrate. The circuit element has a first interface layer and a first conductive layer. Both the first interface layer and the first conductive layer have cooper materials. The material which makes the first interface layer includes a reactant or a compound of the material which makes the first conductive layer. The method for manufacturing includes the following steps: forming a first interface layer on the substrate; forming a first conductive layer on the first interface layer; and etching the first conductive and interface layers to form a pattern. The existence of the first interface reduces the penetration of the first conductive layer on the substrate and improves the adhesive force between the first conductive layer and the substrate.

Display panel structure and manufacture method thereof

The present invention includes the steps of providing a substrate having a main surface; depositing a dual-metal layer such as Mo/AlNd, MoW/AlNd, MoW/Al onto the main surface of the substrate; defining gate and word line patter using a layer of photoresist; and using the photoresist as an etching mask, a first metal dry etching process is carried out to etch the dual-metal layer at an etching selectivity that is significantly higher than prior art. The first metal dry etching process uses oxygen/fluorine containing etching gas mixture and oxygen/chlorine containing etching gas mixture to form the dual-metal gate and word line pattern having slightly oblique sidewalls. End point detection mode detected at 704 nm is used in the first metal dry etching process.

Method for fabricating liquid crystal display panel array

A display panel structure having a circuit element disposed thereon and method of manufacture are provided. The display panel includes a substrate and the circuit element disposed on the substrate. The circuit element has a first interface layer and a first conductive layer. Both the first interface layer and the first conductive layer have copper materials. The material which makes the first interface layer includes a reactant or a compound of the material which makes the first conductive layer. The method for manufacturing includes the following steps: forming a first interface layer on the substrate; forming a first conductive layer on the first interface layer; and etching the first conductive and interface layers to form a pattern. The existence of the first interface reduces the penetration of the first conductive layer on the substrate and improves the adhesive force between the first conductive layer and the substrate.

A method for cleaning a plasma chamber after metal etching. First, a substrate having a metal layer thereon is placed in a plasma chamber. Next, the metal layer is etched. Finally, the substrate is removed from the plasma chamber to perform a dry cleaning which includes the following steps. First, the inner wall of the plasma chamber is cleaned by plasma etching using oxygen as a process gas. Next, the top and bottom electrode plates in the plasma chamber are cleaned by plasma etching using chlorine and boron chloride as process gases. Next, the inner wall of the plasma chamber is cleaned again by plasma etching using sulfur hexafluoride and oxygen as process gases. Finally, oxygen and helium used as purging gases are injected into the plasma chamber and exhausted from therein.

Growing community of inventors

Hsin-Chu, Taiwan

Shu-Feng Wu