Freescale Semiconductor,inc.

Shruti Rakheja

Sunny Arora

Pawan Deep Gandhi

Rashmi Moudgil

A system for scan testing various clock domains of an integrated circuit includes a clock gate control unit and clock gating cells. The clock gating cells receive a single test clock signal provided externally through one package pin of the integrated circuit. The clock gate control unit provides clock gate control signals to the clock gating cells. The clock gating cells generate time-staggered clock signals based on the clock gate control signals.

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Bengaluru, India

Shruti Rakheja