Texas Instruments Corporation

Shridhar Atmaram More

Rahul Vijay Kulkarni

Kaustubh Ulhas Gadgil

Amal Kumar Kundu

Minkle Eldho Paul

Abhijeet Gopal Godbole

An analog to digital (A/D) converter includes a capacitor array having respective first terminals selectively coupled to a reference voltage or ground via a plurality of switches and having respective second terminals coupled to a sample and hold (S/H) output. The A/D converter also includes a voltage comparator having a first input coupled to the S/H output and having a second input coupled to a bias voltage. The voltage comparator is configured to output a comparison voltage responsive to a sampled charge at the S/H output and the bias voltage. The A/D converter also includes a successive approximation register coupled to receive the comparison voltage and configured to output an approximate digital code responsive to the comparison voltage, wherein the approximate digital code is varied by controlling an equivalent capacitance of the capacitor array.

Analog to digital (A/D) converter with internal diagnostic circuit

An integrated self-test mechanism for monitoring an analog-to-digital converter (ADC), a reference voltage (V) source associated with the ADC, a low-dropout regulator (LDO), or a power supply is provided. In one example, an ADC that is associated with an integrated circuit (IC) can monitor its own V, the voltage (V) of an LDO associated with the IC, or the voltage (AVDD) provided to an electrical coupling mechanism in the IC that is coupled to a power supply associated with the IC. The ADC can generate a digital output code based, at least in part, on the Vand one or more of the Vand the AVDD. The digital output code can be used to determine whether one or more of the ADC, the Vsource, the LDO, and the power supply is malfunctioning or nonoperational.

Integrated self-test mechanism for an analog-to-digital converter, a reference voltage source, a low dropout regulator, or a power supply

A device includes a capacitive digital to analog converter (CDAC) that further includes a plurality of capacitors to sample an analog input signal. The sampled analog input signal is converted into a digital signal and the digital signal is stored by a successive approximation register (SAR). Thereafter, the SAR regenerates the stored digital signal to a reset plurality of capacitors, and a comparator is configured as an amplifier to generate an equivalent analog voltage of the stored digital signal.

Sample and hold circuit with indefinite holding time

An analog-to-digital converter includes an input terminal, a digital-to-analog converter, a comparator, and successive approximation circuitry. The input terminal is configured to receive a multi-bit digital threshold value from circuitry external to the analog-to-digital converter. The successive approximation circuitry is coupled to the comparator and the digital-to-analog converter. The successive approximation circuitry is configured to operate in a comparison mode and a conversion mode, and to provide the multi-bit digital threshold value to the digital-to-analog converter while operating in the comparison mode. The comparator is coupled to the digital-to-analog converter and the successive approximation circuitry. The comparator is configured to output a signal that indicates whether an analog input signal exceeds an analog threshold signal corresponding to the multi-bit digital threshold value.

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Shridhar Atmaram More