Oki Electric Industry Co., Ltd.

Yokogawa Medical Systems, Limited

Shozo Tomita

Keiki Yamaguchi

Masahiko Hasumi

Edward L Gow

An interface circuit providing serial access to a non-volatile memory in an integrated circuit has at least two memory-access scan registers and at least one selection scan register coupled in common to a data input terminal of the integrated circuit. These registers are also coupled through a multiplexer to a data output terminal of the integrated circuit. The memory-access scan registers receive serial data such as address data and data to be written in the non-volatile memory at the specified addresses. The selection scan register receives a code for selecting the memory-access scan registers. Serial access to the non-volatile memory is speeded up because the memory-access scan registers can be accessed individually.

Interface circuit and method for writing data into a non-volatile memory, and scan register

There is provided an address decoder which allows a high-speed operation without causing a malfunction. When a pre-charge signal is in a state of being set at a logical level of '0', an address driver is brought into a state of being held at '1'. When the pre-charge signal is in a state of being set to a logical level '1', the address driver outputs a drive signal pair which becomes positive phase and negative phase of an address signal to each of the drive signal lines. A detection circuit is connected to each signal line of at least one drive signal pair among a plurality of signal pairs at an end portion of the signal lines on the side opposite to the address driver. The decoding circuits all have the same circuit structure. Eight input terminals are connected to either one of the signal lines and are uniformly disposed along the drive signal lines. When the detection circuit monitors the change of either one of the signal lines connected thereto to '0' and detects determination of the input drive signals in the decoding circuit, a control circuit receives an outputted detection signal and changes the enable signal to '0' so as to be brought into a decode-enabled state.

Address decoder and address decoding method

A pulse counter has a programmable prescaler that divides the frequency of an input clock pulse signal by a factor designated by a code signal. A counter counts the prescaled clock pulse signal output by the programmable prescaler to generate a count output. A code generator encodes the count output to generate the code signal that controls the programmable prescaler.

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Tokyo, Japan

Shozo Tomita