Texas Instruments Corporation

Shoubao Yan

Vadim Valerievich Ivanov

Walter Baker Meinel

David Baum

Gerald William Steele

A differential amplifier (D) includes circuitry (,R,R) coupling a common mode component of an input voltage (Vin&#x2212;Vin) to a maximum voltage selector circuit () that produces an internal voltage (V) equal to the larger of a first supply voltage (V) and the common mode component. An input amplifier circuit () of the differential amplifier is powered by the internal voltage. The input voltage (Vin&#x2212;Vin) is coupled to inputs (A,B) of the input amplifier circuit (). Outputs (A,B) of the input amplifier circuit () are amplified by an output amplifier ().

High-voltage differential amplifier and method using low voltage amplifier and dynamic voltage selection

A CMOS circuit including a P-channel pull-up transistor (MP) and an N-channel pull-down transistor (MN) includes a first feedback circuit () producing a first delayed signal (V) on the gate of the pull-down transistor (MN) to turn on the pull-down transistor (MN) a first predetermined amount of time after the pull-up transistor (MP) is turned completely off so as to prevent any shoot-through current from flowing through the pull-up transistor (MP) and the pull-down transistor (MN) and a second feedback circuit () producing a second delayed signal (V) on the gate of the pull-up transistor (MP) to turn on the pull-up transistor (MP) a second predetermined amount of time after the pull-down transistor (MN) is turned completely off so as to prevent any shoot-through current from flowing through the pull-up transistor (MP) and the pull-down transistor (MN).

CMOS comparator output stage and method

A CMOS circuit including a P-channel pull-up transistor (MP) and an N-channel pull-down transistor (MN) includes a first feedback circuit ( ) producing a first delayed signal, (V ) on the gate of the pull-down transistor (MN) to turn on the pull-down transistor (MN) a first predetermined amount of time after the pull-up transistor (MP) is turned completely off so as to prevent any shoot-through current from flowing through the pull-up transistor (MP) and the pull-down transistor (MN) and a second feedback circuit ( ) producing a second delayed signal (V ) on the gate of the pull-up transistor (MP) to turn on the pull-up transistor (MP) a second predetermined amount of time after the pull-down transistor (MN) is turned completely off so as to prevent any shoot-through current from flowing through the pull-up transistor (MP) and the pull-down transistor (MN).

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Tucson, AZ, United States of America

Shoubao Yan