Elpida Memory, Inc.

Nec Corporation

Hoya Corporation

Other

Ps4 Luxco S.a.r.l.

Elipida Memory, Inc.

Shotaro Kobayashi

Yasuhiro Takai

Katsuhiro Kitagawa

Hiromasa Takeda

Toru Ishikawa

Mitsuaki Katagiri

Satoshi Isa

Shingo Tajima

Mayu Miyauchi

Katsunori Uchida

Tatsuhiro Fukushima

A semiconductor device comprises: a control signal generating circuit that generates and outputs a control signal that is in an active state during a period around at least one of rising edges and falling edges of a clock signal; and a data input circuit that is controlled to be in an active state, in which a data signal can be received, while the control signal is in an active state, and otherwise controlled to be in an inactive state.

Semiconductor device and control method thereof for permitting the reception of data according to a control signal

A medical observation system, which includes a medical probe that observes a subject by scanning on the subject with laser light; a laser source that supplies the laser light to the medical probe; a judgment unit that judges whether the medical probe is in a predetermined state; and a control unit that controls an amount of laser light emitted from the laser source based on a judgment result by the judgment unit.

Medical observation system and processor

A semiconductor device according to the present invention includes an input circuit that is connected between an input node and an output node and that changes a level of the output node corresponding to a signal supplied to the input node, wherein when a control signal represents a first mode, a speed at which input circuit changes the level of the output node from a first level to a second level is greater than the speed at which input circuit changes the level of the output node from the second level to the first level and when the control signal represents a second mode, the speed at which input circuit changes the level of the output node from the second level to the first level is greater than the speed at which the input circuit changes the level of the output node from the first level to the second level.

Semiconductor device and input signal reception circuit

An electronic endoscope includes a white light source, an excitation light source, an imaging device, and a light amount controller. The white light source emits white light for illuminating a subject. The excitation light source emits excitation light for generating fluorescent light on the subject. The imaging device generates first image signals by receiving reflected light of the white light, and generates second image signals by receiving the fluorescent light. The light amount controller controls the amount of the white light to lower the difference between a reflected light luminance and a fluorescent light luminance, so that a normal image corresponding to the first image signals and a fluorescent image corresponding to the second image signals that are both real-time images representing the same subject at the time of receiving the reflected light and the fluorescent light can be generated.

Electronic endoscope

A semiconductor device includes a first pad row and a second pad row, a first ground potential supply electrode which is connected to a first interconnect provided near the first pad row, and a second ground potential supply electrode which is connected to a second interconnect provided near the second pad row. The first pad row includes a first pad connected to the first circuit within the chip and connected to the first interconnect via a first bonding wire, and includes a second pad connected to a second circuit within the chip and connected to the second interconnect via a second bonding wire crossing over the second pad row.

Semiconductor device that suppresses malfunctions due to noise generated in internal circuit

A semiconductor device includes a pad for sense amplifier ground potential as an electrode pad supplying ground potential voltage to a sense amplifier, a first conductive line connected to the pad for sense amplifier ground potential, and a second conductive line connected to an electrode pad closest to the pad for sense amplifier ground potential among plural electrode pads included in a pad row. The second conductive line extends to the opposite side of the first conductive line with the pad row as a reference.

Semiconductor device including plural electrode pads

A scanning endoscope comprising a light transmitter, an actuator, and a force transmitter, is provided. The light transmitter emits a beam of the light exiting the first emission end. The light transmitter is flexible. A longitudinal direction of the light transmitter is a first direction. The actuator is mounted near the first emission end. The actuator bends the light transmitter in a second direction by pushing a side of the light transmitter in the second direction. The second direction is perpendicular to the first direction. A force transmitter is oriented lengthwise in the first direction. The force transmitter is elastic. The force transmitter is positioned between the light transmitter and the actuator. The force transmitter exerts a pushing force supplied by the actuator on the side of the light transmitter while the force transmitter is deformed elastically toward the first direction.

Scanning endoscope having an actuator and a force transmitter for bending a light transmitter

A semiconductor device includes a selection circuit for selecting a specific pad of a semiconductor memory. The semiconductor device is configured to produce a signal determined by a pin array by the selection circuit.

Semiconductor device with a selection circuit selecting a specific pad

The on-die termination circuit of the present invention includes a main resistance circuit and an adjustment circuit. The main resistance circuit is provided with a resistance element and a transistor that is turned OFF when the on-die termination circuit is to be placed in the OFF state and turned ON when the on-die termination circuit is to be placed in the ON state. The adjustment circuit is provided with transistors that are both connected together in parallel and connected in parallel to the main resistance circuit, and that are turned ON or OFF when the on-die termination circuit is placed in the ON state so as to adjust the termination resistance of the entire on-die termination circuit.

Semiconductor apparatus

A semiconductor memory device may include a memory that stores data, an input/output unit and a loopback circuit. The input/output unit inputs and outputs data of a predetermined number of bits in synchronization with a clock signal. The input/output unit may include, but is not limited to, the same number of data input/output terminals as the predetermined number of bits. The loopback circuit performs loopback operation to read data of the predetermined number of bits out of a first optional area of the memory and to write the data into a second optional area of the memory.

Semiconductor memory device and method of testing semiconductor memory device

A DLL circuit includes a delay line that generates an internal clock signal by delaying an external clock signal CLK, a counter circuit that sets a delay amount of the delay line, a phase detecting circuit that generates a phase determination signal based on a phase of the external clock signal, and an antialiasing circuit that prohibits the counter circuit to update a count value based on the phase determination signal, in response to a fact that a jitter component included in the external clock signal is equal to or higher than a predetermined frequency. With this configuration, a problem that the internal clock signal is continuously controlled to a wrong direction due to malfunction of aliasing does not occur.

DLL circuit and semiconductor device having the same

Disclosed is a PLL circuit including a phase frequency detector (PFD) for comparing phase and frequency between an input signal and an output signal, a charge pump circuit for charging a capacitor when an up-signal from the PFD is activated, discharging the capacitor when a down-signal is activated, and for outputting the terminal voltage of the capacitor as a control voltage, and a VCO for outputting an output signal of a frequency in accordance with the control voltage. An output of the VCO is fed back as an output signal to the PFD as input. The PFD includes a delay adjustment circuit for exercising control for resetting the up-signal and the down-signal with a preset delay as from a time point both up-signal and the down-signal have been activated. There is also provided a comparator amplifier circuit for comparing a reference voltage, corresponding to a control voltage when both up-signal and down-signal are activated, to supply first and second control signals to the delay adjustment circuit. The pulse widths of up and down-signals are adjusted depending on current offset characteristics of the charge pump circuit.

PLL circuit

A configuration detection device includes a light-providing optical fiber, a light reflector a curvature-detecting optical fiber, and a light modulator. The light-providing optical fiber transmits detection light in a plurality of wavelength ranges that have different wavelengths from one another, The light reflector reflects the detection light as reflected light. The curvature-detecting optical fiber transmits the reflected light, and is bent together with an endoscope. The light modulator modulates at least one of the strength or the wavelength of the reflected light for each of the wavelength ranges. Based on at least one of the strength or the wavelength of the reflected light that is pre-modulated and post-modulated, and based on the distance between the light modulator and the output end of the curvature-detecting optical fiber, the configuration of the endoscope is detectable.

Configuration detection device for endoscope

Adjustment of termination resistance in an on-die termination circuit

A delay circuit includes a first delay line circuit having a plurality of stages of delay units, a second delay line circuit having a plurality of stages of delay units, a plurality of transfer circuits provided in association with respective stages of the delay units of the first delay line circuit, the transfer circuits controlling the transfer of the outputs of the delay units of the first delay line circuit to associated stages of the delay units of the second delay line circuit. The delay units of respective stages of the first delay line circuit inverting input signals. Each stage delay unit of the second delay line circuit includes a logic circuit receiving an output signal of the transfer circuit associated with the delay unit in question and an output signal of a preceding stage to send an output signal to a following stage. The duty ratio is rendered variable by independently selecting the rising edge of the input signal and a propagation path of the falling edge.

Growing community of inventors

Tokyo, Japan

Shotaro Kobayashi