Hitachi Ulsi Engineering Corp.

Other

Hitachi, Ltd.

Renesas Technology Corp.

Renesas Electronics Corporation

Usli Engineering Corp.

Shooji Kubono

Hitoshi Miwa

Osamu Tsuchiya

Tatsuya Ishii

Keiichi Yoshida

Hitoshi Kume

Tetsuya Ishii

In a nonvolatile semiconductor memory device wherein a plurality of threshold voltages are set so as to store multi-valued information in one memory cell, data is first written into the memory cell whose threshold voltage is the lowest as a written state from the erase level, and data is successively written into memory cells whose threshold voltages are higher.

Nonvolatile semiconductor memory including multi-threshold voltage memory cells including voltage ranges indicating either an erase state or a two or more program state

A nonvolatile semiconductor memory recovers variation in the threshold of a memory cell due to disturbance related to a word line. The nonvolatile memory continuously performs many writing operations without carrying out single-sector erasing after each writing operation, performing the additional writing operations quicker than the usual writing operation, and lightening the burden imposed on software for use in additional writing. The data stored in a designated sector is read out before being saved in a register, and the selected sector is subjected to single-sector erasing when a predetermined command is given. Then write expected value data is formed from the saved data and data to be additionally written, completing the writing operation.

Nonvolatile memory system, semiconductor memory and writing method

Nonvolatile memory system, semiconductor memory, and writing method

In a nonvolatile semiconductor memory device wherein a plurality of threshold voltages are set so as to store multivalued information in one memory cell, data is first written into the memory cell whose threshold voltage is the lowest as a written state from the erase level, and data is successively written into memory cells whose threshold voltages are higher.

Nonvolatile semiconductor memory device and data writing method therefor

In the nonvolatile semiconductor memory device, a plurality of threshold voltages are associated with the programming of multi-valued information in one memory cell, data is first written into a memory cell having a threshold voltage which is the lowest or furthest away from the threshold voltage corresponding to the erase level, and data is successively written into memory cells having higher threshold voltages, namely, threshold voltages that are successively closer to the erase level, thereby overcoming threshold voltage fluctuations attributed to word line disturbance. The memory device features memory cells each of which has a control gate and a floating gate and facilitated for storing multi-level data; an array of word and data lines, each intersection of which corresponds to an individual memory cell; data latch circuits each of which is coupled to a data line and stores data to be written; and sense latch circuits each of which is coupled to a data line and stores readout data from memory cells coupled to a selected word line. In the nonvolatile memory, when occurrence of an erratic bit is detected based on data stored in the sense latch circuits and in the data latch circuits, the memory cell associated with that erratic bit is corrected.

Nonvolatile semiconductor memory device including correction of erratic memory cell data

Growing community of inventors

Akishima, Japan

Shooji Kubono