Kabushiki Kaisha Toshiba

Toshiba Electronic Devices & Storage Corporation

Shoko Hanagata

Tomoko Matsudai

Yusuke Kawaguchi

Norio Yasuhara

Yoko Iwakaji

Kenichi Matsushita

Keiko Kawamura

Hiroko Itokazu

Daiki Yoshikawa

A semiconductor device includes: a first electrode; a first semiconductor layer on the first electrode in a diode region; a second semiconductor layer on the first electrode in an IGBT region; a semiconductor layer on the first and second semiconductor layers, a first upper layer of the semiconductor layer in the diode region including a first region adjacent to the IGBT region and a second region separated from the IGBT region, an impurity concentration being less in the first region than in the second region; a third semiconductor layer on the semiconductor layer; a fourth semiconductor layer of the third semiconductor layer in the IGBT region; a third electrode extending in a direction from the fourth semiconductor layer toward the semiconductor layer; and an insulating film between the second electrode and each of the third semiconductor layer, the semiconductor layer, and the third electrode.

Semiconductor device

A semiconductor device includes first and second electrodes, first regions of a first conductivity type, second regions of a second conductivity type, a third region of the first conductivity type, fourth regions of the second conductivity type, fifth regions of the second conductivity type. The first and second regions are on the first electrode. The third region is on the first and second regions. The fourth and fifth regions are on the third region. The second electrode is on the fourth and fifth regions. Every second region is directly below a fifth region.

Semiconductor device with complementary cathode regions

This semiconductor device includes: a semiconductor layer having a first face and a second face, the semiconductor layer including a first trench and a second trench in a first face side; a first gate electrode in the first trench; a first conductive layer in the first trench and between the first gate electrode and the second face, the first conductive layer being electrically separated from the first gate electrode; a second gate electrode in the second trench; a second conductive layer in the second trench and between the second gate electrode and the second face; a first electrode on a the first face side; a second electrode on a side of the second face; a first gate electrode pad being electrically connected to the first gate electrode; and a second gate electrode pad being electrically connected to the second gate electrode.

Semiconductor device and semiconductor circuit

A semiconductor device in which IGBT regions and diode regions are alternately set along a first direction, includes first to third electrodes, and a semiconductor portion. The semiconductor portion includes a collector layer, a low-concentration cathode layer, a high-concentration cathode layer, a drift layer, anode layers, base layers, and an emitter layer. The low-concentration cathode layer and the high-concentration cathode layer are in contact with the first electrode. When the diode region on a lower surface of the semiconductor portion is divided into three equal regions of a first peripheral region, a central region, and a second peripheral region along the first direction, an area ratio of the low-concentration cathode layer in the central region is higher than the area ratio of the low-concentration cathode layer in the first peripheral region and the second peripheral region.

A semiconductor device includes a semiconductor layer. The semiconductor layer has bottom and upper surfaces opposite to each other in a first direction. The semiconductor layer includes a first region of a first conductivity type at the bottom surface, a second region of the first conductivity type at the bottom surface surrounding the first region, a third region of the first conductivity type above the first and second regions, and a fourth region of a second conductivity type extending from the upper surface into the third region. In a first cross sectional plane along the first direction, an outer edge of the first region is within an outer edge of the fourth region by a first distance. In a second cross sectional plane along the first direction, an outer edge of the first region is within an outer edge of the fourth region by a second distance.

Growing community of inventors

Komatsu Ishikawa, Japan

Shoko Hanagata