Oki Electric Industry Co., Ltd.

Shoji Yo

Kazuya Suzuki

Hiroaki Uchida

Osamu Nanba

Yoshiki Nagatomo

A method for manufacturing a semiconductor device including an electrode having a lower silicon layer and an upper silicon layer which is formed on the lower silicon layer. A concentration of impurities in the upper silicon layer is higher than a concentration of impurities in the lower silicon layer.

Semiconductor memory device and manufacturing method thereof

A first insulating layer is formed on semiconductor substrate, and a trench is formed in the first insulating layer. An amorphous silicon layer doped with impurities is formed on a side and bottom walls of the trench. Next, a resist material is partially filled in the trench so that an upper portion of the amorphous silicon layer is exposed. The exposed portion is implanted with impurity ions. After removal of the resist material, the amorphous silicon layer is heat treated so as to grow hemispherical grains on its surface.

Method of Fabricating a capacitor structure having hemispherical grains

A semiconductor device includes a silicon layer. The silicon layer includes a lower silicon layer and an upper silicon layer which is formed on the lower layer. A concentration of impurities in the upper silicon layer is higher than that of the lower silicon layer.

Growing community of inventors

Tokyo, Japan

Shoji Yo