Hitachi, Ltd.

Canon Kabushiki Kaisha

Shoji Kimura

Mitsuo Nakajima

Kenji Katsumata

Toshiyuki Kurita

Toshinori Murata

Yasutaka Tsuru

Nobukazu Adachi

Yuji Yamamoto

Masato Sugiyama

Haruki Takata

Takanori Eda

Kazuo Ishikura

Takumi Okamura

Yasuhiro Hirano

Tsuguo Itagaki

Moriyoshi Akiyama

In order to carry out format conversion or scaling processing of picture signal by a memory having a small capacity, picture signals of interlace scanning are converted into picture signals of progressive scanning by interpolation by using an IP convertor 1 and a multiple scan convertor 3, a scaling processing of expansion and compression in the horizontal direction is firstly performed by using a horizontal scaling unit 5, processing of expansion, compression, frame rate conversion, synchronization and the like are secondly performed by using a vertical scaling unit 6 and commonly using memories used in scaling processing in the vertical direction and finally, color space conversion or inverse gamma processing is performed by using a picture quality improving unit 8 thereby converting the picture signals into picture signals S6 having a predetermined format.

Method and circuit for signal processing of format conversion of picture

An apparatus and a method for receiving television signals can display a television signal of a novel signal format, even at a low cost, without addition of any hardware. The apparatus and a method for receiving a television signal employs a data input unit for receiving video data encoded by any one format among multiple kinds of encoding formats, a video data memory for storing the video data from the data input unit, a decoding process program memory for storing multiple kinds of decoding process programs for decoding processes corresponding to received video data having multiple kinds of encoding formats, a programmable logic device which can vary the hardware constitution for the decoding process, a logic device varying unit for varying the hardware constitution for the decoding process, a decoding control unit for varying the circuit constitution of the programmable logic device via the logic device varying unit depending on the encoding format of the input video data and decoding the video data stored in the video data memory into a video signal which may be displayed depending on the decoding process program, and a display for displaying the decoded video signal.

Video decoder/converter with a programmable logic device which is

The sheet discharge apparatus includes a first sheet discharge path for discharging a sheet and a second sheet discharge path for discharging the sheet. The apparatus further includes a sheet stacking tray on which the sheets discharged through the second sheet discharge path and which is pivotally mounted on a body of the apparatus, a reverse rotation guide rotatably supported by the sheet stacking tray and forming a part of the first sheet discharge path, and a holder for holding the reverse rotation guide in a position where the reverse rotation guide forms a part of the first sheet discharge path in a condition that the sheet stacking tray is closed with respect to the body of the apparatus and for releasing the reverse rotation guide to permit the reverse rotation guide to thereby retard to a retard position where the reverse rotation guide is retarded from a stacking surface of the sheet stacking tray not to prevent the sheet from being directed in the sheet stacking tray.

Sheet discharge apparatus and image forming apparatus having such sheet

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Kawasaki, Japan

Shoji Kimura