Mitsubishi Denki Kabushiki Kaisha

Renesas Technology Corp.

Shoichi Miyamoto

Toshiaki Iwamatsu

Takashi Ipposhi

Shigenobu Maeda

Yasuo Yamaguchi

Yasuo Inoue

Akihiko Furukawa

Yuuichi Hirano

Takuji Matsumoto

Shigeto Maegawa

A partial oxide film with well regions formed therebeneath isolates transistor formation regions in an SOI layer from each other. A p-type well region is formed beneath part of the partial oxide film which isolates NMOS transistors from each other, and an n-type well region is formed beneath part of the partial oxide film which isolates PMOS transistors from each other. The p-type well region and the n-type well region are formed in side-by-side relation beneath part of the partial oxide film which provides isolation between the NMOS and PMOS transistors. A body region is in contact with the well region adjacent thereto. An interconnect layer formed on an interlayer insulation film is electrically connected to the body region through a body contact provided in the interlayer insulation film. A semiconductor device having an SOI structure reduces a floating-substrate effect.

Semiconductor device, method of manufacturing same and method of designing same

A partial oxide film () with well regions formed therebeneath isolates transistor formation regions in an SOI layer () from each other. A p-type well region () is formed beneath part of the partial oxide film () which isolates NMOS transistors from each other, and an n-type well region () is formed beneath part of the partial oxide film () which isolates PMOS transistors from each other. The p-type well region () and the n-type well region () are formed in side-by-side relation beneath part of the partial oxide film () which provides isolation between the NMOS and PMOS transistors. A body region is in contact with the well region () adjacent thereto. An interconnect layer formed on an interlayer insulation film () is electrically connected to the body region through a body contact provided in the interlayer insulation film (). A semiconductor device having an SOI structure reduces a floating-substrate effect.

In a semiconductor device having an SOI structure and a method of manufacturing the same, influence by a parasitic transistor can be prevented, and no disadvantage is caused in connection with a manufacturing process. In this semiconductor device, an upper side portion of a semiconductor layer is rounded. Thereby, concentration of an electric field at the upper side portion of the semiconductor layer can be prevented. As a result, lowering of a threshold voltage of a parasitic transistor can be prevented, so that the parasitic transistor does not adversely affect subthreshold characteristics of a regular transistor. Owing to provision of a concavity of a U-shaped section, generation of etching residue can be prevented when etching a gate electrode for patterning the same. Thereby, a disadvantage is not caused in connection with the manufacturing process.

Semiconductor device formed on insulating layer and method of manufacturing the same

A semiconductor device comprising an SOI substrate fabricated by forming a silicon layeron an insulating layer, a plurality of active regionshorizontally arranged in the silicon layer, and element isolating partshaving a trench-like shape which is made of an insulatorembedded between the active regionsin the silicon layer, wherein the insulating layerhas spacespositioned in the vicinity of interfaces between the active regions and the element isolating parts, whereby it becomes possible to reduce fixed charges or holes existing on a side of the insulating layer in interfaces between the silicon layer and the insulating layer, which fixed charges or holes are generated in a process of oxidation for forming the insulating layer on a bottom surface of the silicon layer.

Semiconductor device having an SOI substrate

An SOI substrate ( ) comprises a buried oxide film ( ), an SOI layer ( ) formed on a first region ( ) of the surface ( S) of the buried oxide film, and a silicon oxide film ( ) formed on a second region ( ) of the surface ( S). Formed on the peripheral portion of the SOI layer ( ) is a silicon oxide film ( ), the side surface ( H) of which is integrally joined to the side surface ( H) of the silicon oxide film ( ). The thickness of the peripheral portion of the SOI layer ( ) decreases as closer to the end portion ( H) of the SOI layer ( ), while the thickness of the silicon oxide film ( ) formed on the peripheral portion of the SOI layer ( ) increases as closer to the end portion ( H). A gate oxide film ( ) is formed on a predetermined region of the surface of the SOI layer ( ), and joined to the silicon oxide film ( ) at its end portion. A gate electrode ( ) is then formed on the surface of the gate oxide film ( ) and on a portion where the silicon oxide film ( ) is integrally joined to the gate oxide film ( ). In this manner, an SOI/MOSFET is obtained with no parasitic element formed at the end portion of the SOI layer.

Semiconductor device and manufacturing method thereof

A semiconductor device comprising an SOI substrate fabricated by forming a silicon layer on an insulating layer , a plurality of active regions horizontally arranged in the silicon layer , and element isolating parts having a trench-like shape which is made of an insulator embedded between the active regions in the silicon layer , wherein the insulating layer has spaces positioned in the vicinity of interfaces between the active regions and the element isolating parts , whereby it becomes possible to reduce fixed charges or holes existing on a side of the insulating layer in interfaces between the silicon layer and the insulating layer, which fixed charges or holes are generated in a process of oxidation for forming the insulating layer on a bottom surface of the silicon layer.

Semiconductor device

A gear-mesh type automatic transmission system capable of controlling clutch coupling speed so as to mitigate shock likely to occur upon changeover of speed stage regardless of not only time-dependent deterioration of an electromagnetic clutch but also dispersion among individual clutches. The gear-mesh type automatic transmission system includes an electromagnetic clutch ( ) for effectuating transmission and interruption of output power from an output shaft ( ) of an engine ( ) to an input shaft ( ) of a gear-mesh type transmission ( ), a shift/select actuator ( ) for shifting a speed change gear to a shift/select position in the gear-mesh type transmission ( ), a shift/select position sensor ( ) for detecting a shift/select position of the speed change gear, and a control unit ( ) for driving the shift/select actuator ( ) in accordance with a shift lever position selected by a driver, to thereby change over automatically the gear-mesh type transmission ( ) to a target speed stage. The control unit ( ) is designed to couple the electromagnetic clutch ( ) while carrying out a feedback control on the basis of a rate of change of rotation speed of the engine ( ) in succession to the speed stage changeover.

Gear-mesh type automatic transmission system

A semiconductor device having a trench-shaped isolator, adjacent to the semiconductor element region is formed having a width which is continuously decreased in the downward direction for relaxing the stress in the silicon layer. Embodiments include forming a patterned dielectric layer on an SOI substrate, forming sidewall spacers thereon, and etching the underlying silicon layer followed by oxidation or controlled etching to form the trench with downwardly decreasing side surfaces.

Method of manufacturing trench-shaped isolator

In a gear type automatic transmission system which senses a shift&middot;select position of a gear transmission stage by a shift&middot;select position sensor then switches automatically the gear transmission stage of a gear type automatic transmission unit into a target transmission stage by a gear switching actuator , and then transmits or cuts off a power from an output shaft of an engine to an input shaft of the gear type automatic transmission unit by an electromagnetic clutch clutch engagement in starting is carried out more quickly than the normal operation, in the fault operation of the gear type automatic transmission unit. In addition, the clutch engagement to cause the vehicle to run at a creeping speed (creep) without depression of an accelerator pedal (partial clutch engagement) can be inhibited.

Gear type automatic transmission unit and method for controlling the same

The invention provides a semiconductor device having the trench-shaped isolator is provided with a portion which is adjacent to the semiconductor element region, of which the width is continuously decreased in the downward direction, and of which the surface is planarized near the semiconductor element region, for relaxing the stress in the silicon layer and being flat the surface of the trench-shaped insulator, and method of manufacturing the same.

Semiconductor device and method of manufacturing the same

On an insulating film a mesa-isolation silicon layer is formed, in which a channel region and source/drain regions ar included. A gate insulating film and a conducting layer as a part of a gate electrode are stacked on the mesa-isolation silicon layer. A sidewall of an insulating material is formed on side surfaces of the mesa-isolation silicon layer, gate insulating film, and conducting layer at an end portion of the channel region of the mesa-isolation silicon layer, and a gate electrode is formed on the conducting layer.

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Tokyo, Japan

Shoichi Miyamoto