Fujitsu Corporation

Hitachi, Ltd.

Other

Fujitsu Semiconductor Limited

Shoichi Masui

Hiroaki Fujimoto

Shunichi Tano

Motohisa Funabashi

Kazuo Sasaki

Hiroshi Tsuji

Wataru Yokozeki

Satoshi Wakayama

Yoji Taniguchi

Michiko Oba

Hirohide Haga

Seiji Sakaguchi

Kenji Mukaida

Toyozo Aoyama

Masahiko Takenaka

Naoya Torii

Kouichi Kanda

Takuya Sato

Hiroshi Yajima

Ali Sheikholeslami

Kazuhiro Yoshimura

Hiroshi Yoshiura

Hideo Ohata

Kenichi Mizugaki

Toshiyuki Odaka

Toshihiko Nakano

Yoshiaki Kaneko

Koichi Haruna

Masaoki Takaki

Tetsuya Maruoka

Rei Itsuki

Daisuke Abe

Kunio Yamanaka

Michiya Oura

Takeshi Chusho

Hideaki Shinohara

Kikuo Yoshimura

Hiroko Tanabe

Noriko Sasaki

Hiroshi Sugimoto

Trevis Chandler

Yoshihisa Asayama

Mikihiko Oonari

Tsuzumi Ninomiya

Yadollah Eslami

A recognition method executed by a processor, includes: acquiring positional relation between a plurality of sensors each of which senses a distance to an object; provisionally classifying an orientation of the object relative to each individual sensor included in the sensors into one of a plurality of classifications based on sensing data acquired by the individual sensor; calculating likelihood of each combination corresponding to the positional relation between the sensors based on a result of provisional classification of the orientation of the object relative to the individual sensor; and classifying the orientation of the object corresponding to each individual sensor in accordance with the calculated likelihood of each combination.

Method, device, and medium for determining three-dimensional position of skeleton using data acquired by multiple sensors

A learning device generates a plurality of learning images in which a distance image representing a distance from a reference position to each position of a human body or each position of an object and a part image for identifying each part of the human body or a part of the object are associated with each other. The learning device corrects, based on a distance image and a part image of the learning image, a value of a region corresponding to a part of the object among regions of the distance image. The learning device learns, based on a plurality of learning images including a corrected distance image, an identifier in which characteristics of the distance image and a part of the human body or a part of the object are associated with each other.

Distance image processing device, distance image processing system, distance image processing method, and non-transitory computer readable recording medium

A posture recognition system includes a sensor and a recognition apparatus, wherein the sensor captures a distance image including information on a distance to a subject, at an angular field controlled based on the distance to the subject, and the recognition apparatus includes a memory, and a processor coupled to the memory and configured to acquire the distance image and the angular field used when the sensor captures the distance image, from the sensor, and correct the acquired distance image based on a ratio between a first resolution corresponding to another angular field used when a training distance image is captured, and a second resolution corresponding to the acquired angular field, the training distance image being used for generating a learning model which recognizes a posture of the subject.

Posture recognition system, image correction method, and recording medium

A depth-image processing device includes: a memory; and a processor coupled to the memory and configured to: generate, cased on a synthetic model in which a three-dimensional model of a human body and a three-dimensional model of an object are combined, a plurality of learning images in which a depth image that indicates a distance from a reference position to respective positions on the human body or to respective positions on the object, and a part image to identify any one of respective parts of the human body and a cart of the object are associated with each other, and learn an identifier in which a feature of the depth image and any one of a part of the human body and a part of the object are associated with each other, based on the learning images.

Depth-image processing device, depth-image processing system, depth-image processing method, and recording medium

An apparatus includes a memory; a processor coupled to the memory, wherein the processor acquires three-dimensional information of observation points on an object from a sensor, specifies a first area and second areas adjacent to the first area from areas of the object based on the three-dimensional information, and specifies positions of feature points included in the second areas; sets links based on the feature points included in the second areas to estimate positions of skeletons included in the second areas; and uses end points of the skeletons and lengths from the end points of the skeletons to a position of a part included in the first area among parameters used to specify the position of the part, specifies the position of the part included in the first area, and estimates a position of a skeleton included in the first area based on the specified position of the part.

Non-transitory computer-readable recording medium for storing skeleton estimation program, skeleton estimation device, and skeleton estimation method

A sensor device includes: a first portion that is formed of an inorganic semiconductor material, includes a control module, and is reusable; a second portion that is formed of an organic material and separably coupled to the first portion; and a sensor that is disposed in at least one of the first and second portions.

Sensor device for wearable device generating power-on trigger signal

A semiconductor integrated circuit includes a first transmission power mode configured to transmit by a first power, and a second transmission power mode configured to transmit by a second power smaller than the first power, the semiconductor integrated circuit. The semiconductor integrated circuit includes a first transistor configured to receive and amplify a transmission signal in the second transmission power mode, and an attenuator including a resistor element and a switching element, provided between an output of the first transistor and an output terminal, configured to control attenuation of an output signal of the first transistor.

Semiconductor integrated circuit and wireless transmitter

A multiple-word multiplication-accumulation circuit suitable for use with a single-port memory. The circuit is composed of a multiplication-accumulation (MAC) operator and surrounding registers. The MAC operator has multiplicand and multiplier input ports with different bit widths to calculate a sum of products of multiple-word data read out of a memory. The registers serve as buffer storage of multiple-word data to be supplied to individual input ports of the MAC operator. The amount of data supplied to the MAC operator in each clock cycle is adjusted such that total amount of data consumed and produced by the MAC operator in one clock cycle will be equal to or smaller than the maximum amount of data that the memory can transfer in one clock cycle. This feature enables the use of a bandwidth-limited single-port memory, without causing adverse effect on the efficiency of MAC operator usage.

Multiple-word multiplication-accumulation circuit and montgomery modular multiplication-accumulation circuit

To provide a method of measuring a position of a node by using a radio communication system which comprises the node to send a position measuring signal, and a plurality of base stations to receive radio signals from the node, the method including: the base stations watching signals from the node through a predetermined channel; at least one of the base stations sending a reference signal after receiving of the position measuring signal; at least two of the base stations measuring the reception timing of the position measuring signal and the reception timing of the reference signal; and calculating the position of the node by using the reception timing of the position measuring signal and the reference signal measured by the base stations which have received the reference signal, and position information of the base station which has received the position measuring signal.

Positioning system using radio signal sent from node

An arithmetic device for Montgomery modular multiplication which quickly calculates a parameter ND, the parameter ND satisfying R&#xd7;R&#x2212;N&#xd7;ND=1 for an integer N and a radix R that is coprime to and greater than N, with a large number of effective lower bits. The device comprises an ND generator, a multiplication-accumulation (MAC) operator, and a sum data store. The ND generator produces effective lower bits of ND at a rate of k bits per clock cycle, with reference to lower k bits of a variable S, as well as to lower k bits of an odd positive integer N. The MAC operator multiplies the produced k-bit ND value by N and adds the resulting product to S. The sum data store stores the variable S, which is updated with the output of the MAC operator, with its bits shifted right by k bits, for use by the ND generator in the subsequent clock cycle.

Encryption/decryption system for calculating effective lower bits of a parameter for Montgomery modular multiplication

For a predetermined period from the start of a read operation, an electric current is fed to bit lines connected with memory cells so that ferroelectric capacitors of the memory cells are charged. The voltage change of the bit lines are different according to the logic values of data stored in the ferroelectric capacitors. Therefore, the logic value stored in the memory cells can be detected as a time difference. Even if the voltage change of the bit lines is small, the time difference can be reliably generated. Even in case the residual dielectric polarization value of the ferroelectric capacitor is low, therefore, the data can be reliably read from the memory cells. In short, the read margin of data can be better improved than in the case where the logic value of data is detected with a voltage difference.

Ferroelectric memory

An integrated circuit has a sleep switch, provided between a first power line and a second power line, which is constituted by a transistor of a first threshold voltage, and which becomes non-conducting in a sleep mode, and further has a latch circuit, connected to the second power line, which is constituted by a transistor of a second threshold voltage which is lower than the first threshold voltage, and a ferroelectric capacitor for storing data held in the latch circuit in accordance with the polarization direction of a ferroelectric film thereof. The integrated circuit also comprises a control signal generating circuit which, when returning to an active mode from the sleep mode, generates a plate signal for driving a terminal of the ferroelectric capacitor to generate a voltage in the latch circuit in accordance with the polarization direction, and generates a sleep signal for causing the sleep switch to conduct to thereby activate the latch circuit following the driving of the ferroelectric capacitor.

Multi-threshold-voltage integrated circuit having a non-volatile data storage circuit

An information processing apparatus receives a carrier wave modulated in accordance with information and extracts the information and power therefrom to execute a given process. A receiving circuit receives the carrier wave. A dc power generating circuit rectifies the carrier wave received by the receiving circuit to thereby generate dc power. A demodulation circuit is structurally independent of the dc power generating circuit, and retrieves the information modulated onto the carrier wave. An information processing circuit is supplied with the dc power as a power source, and processes the information retrieved by the demodulation circuit in a given manner. Since the demodulation circuit and the dc power generating circuit are structurally independent of each other, interference between elements included in these circuits can be eliminated and simple designing is enabled. In addition, power consumed in the apparatus can be reduced because of optimal designing.

Contactless apparatus and card-type device having clock rectifier that is independent of power rectifier and demodulator with RC time constant based on selectable resistor

A nonvolatile data storage circuit has a data holding circuit having a storage node, and a plurality of ferroelectric capacitors one electrodes of which are connected to the storage node. In this nonvolatile data storage circuit, in store operations to write data from the data holding circuit to the ferroelectric capacitors, the timing of at least the rising or the falling of plate signals supplied to the other electrodes of the plurality of ferroelectric capacitors, is made different. During store operation, the timing of the plate signals applied to the plurality of ferroelectric capacitors connected to the storage node is shifted, so that coupling noise between the ferroelectric capacitors is dispersed and can be reduced, and data inversion of the data holding circuit can be prevented.

Nonvolatile data storage circuit using ferroelectric capacitors

Memory cells each include a latch having storage nodes of data, and ferroelectric capacitors connected to the storage nodes at one ends, respectively, and to a plate line at the other ends. An operation control circuit performs volatile and nonvolatile write operations. A plate driver sets the plate line at a predetermined voltage so that a voltage exceeding a coercive voltage is applied between electrodes of the ferroelectric capacitor connected to either one end of the latch during the volatile write operation. Here, the latch retains the write data. It is therefore possible to dispense with a circuit generating a voltage lower than or equal to the coercive voltage and a circuit for switching voltages. This also eliminates the need for power supply line of the voltage lower than or equal to the coercive voltage, making the wiring area unnecessary. Consequently, the ferroelectric memory can be reduced in chip size.

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Kawasaki, Japan

Shoichi Masui