D2s, Inc.

Cadence Design Systems, Inc.

Shohei Matsushita

Takashi Mitsuhashi

Akira Fujimura

Zhigang Wu

Kenji Yoshida

Dmitri Lapanik

Donald Benton MacMillen

Larry Lam Chau

Tam Dinh Thanh Nguyen

Dmitri Lanpanik

James Fong

Various embodiments of the present invention relate to particle beam writing to fabricate an integrated circuit on a wafer. In various embodiments, cell projection (CP) cell library information is stored in the form of a data structure. Subsequently, the CP cell library information is referenced by a writing system. The patterns are written on the wafer depending on the referenced CP cell library.

Method and system for stencil design for particle beam writing

A system and method for improved electron beam writing that is capable of taking design intent, equipment capability and design requirements into consideration. The system and method determines an optimal writing pattern based, at least in part, on the received information.

System and method of electron beam writing

The present invention increases the number of characters available on a stencil for charged particle beam lithography. A stencil for charged particle beam lithography is disclosed, comprising two character projection (CP) characters, wherein the blanking areas for the two CP characters overlap. A stencil is also disclosed comprising two CP characters with one or more optional characters between the two characters, wherein the optional characters can form meaningful patterns on a surface only in combination with one of the two characters. A stencil is also disclosed wherein the blanking area of a CP character extends beyond the boundary of the stencil's available character area. Methods for design of the aforementioned stencils are also disclosed.

Cell projection charged particle beam lithography

A method for particle beam lithography, such as electron beam (EB) lithography, includes forming a plurality of cell patterns on a stencil mask and shaping one or more of the cell patterns with a polygonal-shaped contour. A first polygonal-shaped cell pattern is exposed to a particle beam so as to project the first polygonal-shaped cell pattern on a substrate. A second polygonal-shaped cell pattern, having a contour that mates with the contour of the first polygonal-shaped cell pattern, is exposed to the particle beam, such as an electron beam, so as to project the second polygonal-shaped cell pattern adjacent to the first polygonal-shaped cell pattern to thereby form a combined cell with the contour of the first polygonal-shaped cell pattern mated to the contour of the second polygonal-shaped cell pattern. The polygonal-shaped contour of the first and second cell patterns may comprise a rectilinear-shaped contour.

Method and system for improving particle beam lithography

A method and system for particle beam lithography, such as electron beam (EB) lithography, is disclosed. The method and system include selecting one of a plurality of cell patterns from a stencil mask and partially exposing the cell pattern to a particle beam, such as an electron beam, so as to selectively project a portion of the cell pattern on a substrate.

Stencil design and method for cell projection particle beam lithography

A method for particle beam lithography, such as electron beam (EB) lithography, includes predefining a stencil design having a plurality of cell patterns with information from a cell library, fabricating the stencil design, synthesizing a functional description into a logic circuit design after predefining the stencil design so that one or more characteristics of the stencil design are considered during synthesizing of the functional description into the logic circuit design, optimizing the logic circuit design, generating a layout design from the optimized logic circuit design, and forming the logic circuit on a substrate according to the stencil design and the layout design.

Growing community of inventors

Yokohama, Japan

Shohei Matsushita