Kabushiki Kaisha Toshiba

Shogo Matsubara

Himio Yamauchi

Hideaki Tokutomi

A video display apparatus includes: an area-specific lighting value calculator configured to calculate a lighting value of each of divided light source regions of a backlight and output the lighting value as numerical data; a signal output module configured to output a video signal correlated with the lighting value to a display module; a backlight controller configured to control the backlight based on the lighting value; a correction gain setting module configured to obtain a signal correction coefficient; a frequency separator configured to separate the input video signal; a signal corrector configured to correct the lighting value with respect to a low frequency component or DC component separated from the input video signal to suppress amplification of noise contained in a dark portion and generate an output video signal; and a display controller configured to control the display module to display the output video signal.

Video display apparatus and video display method

An inter-field pull-down pattern detecting circuit determines whether an input video signal is a first pull-down signal or a second pull-down signal, on the basis of input plug information and a pattern of the consecutive inter-field correlation levels, obtained from an inter-field correlation determination circuit. A counter counts the number of times the pattern detecting circuit determines that the input video signal is the first pull-down signal. The counter is reset to '0' when the input video signal is determined to be other than the first and second pull-down signals. When the count of the counter exceeds a preset value, the input video signal is finally determined to be the first pull-down signal.

Pull-down signal detecting apparatus, pull-down signal detecting method, and video-signal converting apparatus

According to one embodiment, a motion detection correction module is provided which corrects the result of detection by a motion detector, which detects motion in one frame on a pixel-by-pixel basis, for each of small regions obtained by dividing the entire picture on the basis of the result of detection by a picture-based illumination component variation detector that detects interfield illumination component variations on a picture-by-picture basis and the result of detection by a block-based illumination component variation detector that detects interfield illumination component variations on a small-region-by-small-region basis.

Sequential scanning conversion device and method

An image processor includes: an receiving module configured to receive a video signal of a content; an image quality adjusting module configured to adjust image quality of the video signal received by the receiving module using image quality adjustment parameters including at least a contrast-related parameter; a 3D video detecting module configured to determine whether the video signal is of a 3D content; and a control module configured to control the image quality adjusting module to adjust the image quality of the video signal using the contrast-related parameter being set to a second parameter setting for enhancing contrast more than at a first parameter setting, when the video signal is determined to be the 3D content by the 3D video detecting module while the image quality adjusting module is adjusting the image quality using the contrast-related parameter being set at the first parameter setting.

Image processor and method for adjusting image quality

According to one embodiment, an image processing circuit comprising first memory unit which stores image signal, equalizing circuit which, when there is no movement between two picture signals, outputs average signal between the both signals, second memory unit which stores the average signal, pull-down detecting circuit which outputs pull-down interpolation signal for deinterlacing process from a plurality of frames of the pull-down signals when it is determined that the picture signal is based on the pull-down signals upon receipt of the average signal, an output from the second memory unit, and output from the first memory unit, interpolation signal generating circuit which generates interpolation signal, the outputs from the first and second memory units, and noninterlaced scanning conversion circuit which generates noninterlaced signal by adding the pull-down signals to the output from the second memory unit when the picture signal based on the pull-down signals.

Picture processing circuit and picture processing method

According to one embodiment, an apparatus includes an average calculation portion which performs a average calculating process between frames by use of an input signal and one-frame delay signal and acquires an output signal having cross color and dot disturbance components reduced, and an up-convert signal detecting portion which sets the inter-frame mean delay processing portion into an operative state when the input signal is an up-convert signal obtained by up-converting a low-resolution signal into a high-resolution signal.

Cross color and dot disturbance elimination apparatus and method

According to one embodiment, a de-interlacing apparatus includes: a motion vector detecting section; a full-screen shift detecting section detecting a full-screen shift; a moving-or-still judging section performing a moving/still judgment for a video signal; a moving judgment correcting section correcting a moving/still judgment result to lean toward a moving judgment when full-screen shift is detected; a first interpolation signal generating section generating a first interpolation signal for interpolating a one-field delay signal based on the motion vector and the full-screen shift; a second interpolation signal generating section generating a second interpolation signal for interpolating the one-field delay signal from a current field signal or a two-field delay signal; and an interpolation signal mixing section mixing the first and second interpolation signals to generate a mixed interpolation signal.

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Musashino, Japan

Shogo Matsubara