Advanpack Solutions Pte Ltd.

Orion Systems Integration Pte Ltd

Shoa Siong Lim

Hwee Seng Chew

Kian Hock Lim

Amlan Sen

Chee Kian Ong

Klan Hock Lim

The present invention provides a semiconductor substrate () comprising two or more layers of built-up structural layers () formed on a sacrificial carrier (). Each built-up structural layer, comprising a conductor trace layer (,) and an interconnect (), is molded in a resin molding compound. A top surface of the molded compound is abrasively ground and then deposited with an adhesion layer (). A multi-layer substrate () is then obtained after an outermost conductor trace layer () is formed on the adhesion layer and the carrier () or reinforcing ring () is removed.

Multi-layer substrate for semiconductor packaging

A semiconductor package and a manufacturing method thereof are disclosed. The semiconductor package includes a device carrier and a stiffener structure. The device carrier includes at least one insulating layer and at least conductive layer defining at least one trace layout unit. The stiffener structure is disposed on the device carrier, surrounding the periphery of the at least one trace layout unit. The stiffener structure is disposed away from the periphery of the at least one trace layout unit, forming a cavity with the device carrier. The shape and disposition of the stiffener structure enhance the strength of the semiconductor package, impeding flexure to the semiconductor package.

Semiconductor package and manufacturing method thereof

A manufacturing method includes the follow steps. Firstly, a carrier is provided. Then, a plurality of traces are formed on the carrier. Then, a trace molding compound layer is formed on the carrier by a first molding process. Then, the carrier is removed from the trace molding compound layer to expose an etched surface of the trace molding compound layer and trace upper surfaces of the traces. Then, at least a chip is disposed on the etched surface of the trace molding compound layer and the chip is connected to the trace upper surfaces. Then, a chip molding compound layer is formed on the etched surface by a second molding process substantially similar to the first molding process, wherein the chip molding compound layer and the trace molding compound layer are formed of substantially the same molding compound material.

Manufacturing method for semiconductor package

A method for fabricating a flip-chip semiconductor package. The method comprises processing a semiconductor device, for example a semiconductor chip and processing a device carrier, for example a substrate. The semiconductor device comprises bump structures formed on a surface thereof. The substrate comprises bond pads formed on a surface thereof. Processing of the semiconductor chip results in heating of the semiconductor chip to a chip process temperature. The chip process temperature melts solder portions on the bump structures Processing of the substrate results in heating of the substrate to a substrate process temperature. The method comprises spatially aligning the semiconductor chip in relation to the substrate to correspondingly align the bump structures in relation to the bump pads. The semiconductor chip is then displaced towards the substrate for abutting the bump structures of the semiconductor chip with the bond pads of the substrate to thereby form bonds therebetween. A system for performing the above method is also disclosed.

Method for device packaging

A semiconductor substrate including a carrier, a first conductive layer and a second conductive layer is disclosed. The carrier has a first surface, a second surface, and a concave portion used for receiving a semiconductor element. The first conductive layer is embedded in the first surface and forms a plurality of electric-isolated package traces. The second conductive layer is embedded in the second surface and electrically connected to the first conductive layer. The semiconductor substrate can be applied to a semiconductor package for carrying a semiconductor chip, and combined with a filling structure for fixing the chip. Furthermore, a plurality of the semiconductor substrates can be stacked and connected via adhesive layers, so as to form a semiconductor device with a complicated structure.

Growing community of inventors

Singapore, Singapore

Shoa Siong Lim