Other

Shiv Prakash

David Gaines Burnette

Peter Pius Gutberlet

Bryan Darrell Bowyer

Simon Joshua Waters

Lev A Markov

Ian Andrew Guyler

A behavioral synthesis tool for generating an integrated circuit design is described. The behavioral synthesis tool allows a designer to interactively allocate variables or arrays to memory resources without having to modify a source code description of the integrated circuit. The behavioral synthesis tool reads the source code description and generates a synthesis intermediate format stored in memory. The synthesis tool searches the in-memory synthesis intermediate format to find arrays for each process. The arrays are then listed in a graphical user interface (GUI). The GUI allows the designer to create memory resources, specifying the type of memory, the packing mode, etc. The designer is also provided the ability to vary the format among a plurality of formats used to pack arrays to memory during the memory packing process. Upon completion of modifying the memory allocation, the designer saves the changes and such changes are effectuated by automatically updating the synthesis intermediate format.

Array transformation in a behavioral synthesis tool

Guidance provision to the creation of an electronic design is facilitated through a method that includes facilitating interactive exploration of the electronic design by a designer to aid the designer in formulating his/her guidance, and facilitating the designer in interactively providing the formulated guidance. In one embodiment, facilitation of interactive exploration by the designer include facilitating interactive cross-probing into a number of issues about the design, including generated candidate architectures for the design. In one embodiment, the issues available for cross probing include inter-dependencies of data and mobility of operations of the design, as well as occupation of hardware resources for the generated candidate architectures. In one embodiment, Gantt diagrams are employed to facilitate navigation by the designer in performing the interactive cross probing. Gantt diagrams graphically representing the generated candidate architectures are selectively presented to the designer. Data dependencies may be graphically depicted on the Gantt diagrams. Additionally, various aspects of the generated candidate architectures may be correlated back to the behavioral specification of the electronic design for the designer. In one embodiment, the designer may also modified the constraints on the electronic design interactively, applying the information the designer learned through the interactive exploration.

Facilitating guidance provision for an architectural exploration based design creation process

A behavioral synthesis tool for generating an integrated circuit design is described. The behavioral synthesis tool allows a designer to interactively allocate variables or arrays to memory resources without having to modify a source code description of the integrated circuit. The behavioral synthesis tool reads the source code description and generates a synthesis intermediate format stored in memory. The synthesis tool searches the in-memory synthesis intermediate format to find arrays for each process. The arrays are then listed in a graphical user interface (GUI). The GUI allows the designer to create memory resources, specifying the type of memory, the packing mode, etc. The designer can then drag and drop the array variables listed in the GUI onto the memory resources. Upon completion of modifying the memory allocation, the designer saves the changes illustrated in the GUI and such changes are effectuated by automatically updating the synthesis intermediate format.

Growing community of inventors

Tualatin, OR, United States of America

Shiv Prakash