Nec Corporation

Shiro Yoshida

Hirokazu Tohya

Yuzo Shimada

Atsushi Ochi

Kazuaki Utsumi

Toru Mori

Mitsuo Saito

Masayuki Shimizu

Yasushi Kinoshita

Osamu Myohga

Hiroshi Wabuka

Ryo Maniwa

Mitsuo Saitou

Transmission line type components (), which form coaxial lines having a very low characteristic impedance by coaxially installing a cylindrical outer conductor made of a conductive material being larger in diameter than an inner conductor so as to cover via a high dielectric insulating material the surface of an inner conductor made of a conductive material, are inserted in series between a power supply line () and a ground line () connected with a dc source on a printed circuit board and an I.SI () power supply port, whereby almost the entire high-frequency power supply current generated from the I.SI () is reflected off the I.SI () power supply port, and part of the high-frequency power supply current intruding into the components (') is consumed and does not reach the external power supply line ().

Coaxial line type components with low characteristic impedance

A circuit layout design method capable of an LSI circuit or an electronic printed circuit board free of electromagnetic interference is provided. The layout design method according to the invention includes a quasi-stationary circuit reduction step of deviding an entire circuit represented by a net list and a part library into a plurality of quasi-stationary closed circuits having a reduced size so that an intensity of an electromagnetic wave radiated from each of the quasi-stationary closed circuits is not more than a predetermined value; a wiring constraint condition calculation step of calculating constraint conditions for each of wirings mutually connecting the plurality of quasi-stationary closed circuits so that the intensity of the electromagnetic wave radiated from each of the wirings is not more than the predetermined value; and a layout step of laying out parts and the wirings based on the net list and the parts library so as to satisfy the constraint conditions.

Method and system for designing circuit layout

In a semiconductor integrated circuit, a ground plane conductor is formed in a substrate to oppose to a conducting line formed on the substrate, so as to form a microstrip line. A decoupling capacitor is provided on the substrate and is electrically connected between the conducting line and the ground plane conductor so as to bypass a high frequency current component flowing through the conducting line to the ground plane conductor. Thus, the impedance of the conducting line is stabilized, and a path of a feedback current of a high frequency current component flowing through the conducting line is ensured by the ground plane conductor , so that a current loop is minimized, resulting in minimized electromagnetic noises radiated from the current loop.

Semiconductor integrated circuit having an improved grounding structure

The electromagnetic interference suppressing device of the present invention includes a plurality of connection layers and ground layers formed of a conductive material. The connection layers and the ground layers are alternately layered. Insulating layers, formed of an insulating material, intervene between the neighboring connection layers and ground layers. The odd connection layers counting from the bottom and the connection layers just above those layers are electrically connected at the same end. The even connection layers counting from the bottom and the connection layers just above those layers are electrically connected at the same end opposite to the odd connection-layered end. The bottommost connection layer is connected to a first signal terminal. The uppermost connection layer is connected to a second signal terminal. The ground layer is connected to a ground terminal.

Electromagnetic interference suppressing device and circuit

In order to reduce electromagnetic inductive interference due to power source current, in a multi-layer printed board on which a multiplicity of high-speed and high-frequency circuit elements are mounted, a multi-layer printed board has a construction such that on both upper and lower sides of a power source layer provided with power source wiring , are laminated ground layers via respective first insulating material layers , and on one or both of the upper and lower sides of these is laminated a signal layer provided with signal wiring, via a second insulating material layer

Multi-layer printed board

A laminate printed circuit board loaded with transistors, ICs (Integrated Circuits) or LSIs (Large Scale Integrated Circuits) and a method of producing the same are disclosed. The circuit board includes a signal layer, a ground layer and a power supply layer sequentially laminated with the intermediary of insulation layers. An impedance adding circuit is formed in the power supply layer. A magnetic layer is positioned at least above or at least blow the impedance adding circuit. The circuit board with this configuration reduces power supply noise to a noticeable degree.

Laminate printed circuit board with a magnetic layer

A laminated multi-layer printed board having at least a power source circuit layer, at least a ground layer and at least a signal layer includes a hole which extends through the board to the power source circuit layer. An inductor is provided in the hole.

Multi-layer printed board with an inductor providing a high impedance at

There is provided a multi-layered printed wiring board including a power supply layer, a ground layer, a signal layer, and insulators sandwiched between those layers. The power supply layer is provided with a circuit in the form of wirings for imparting impedance thereto. For instance, the power supply layer may be formed to include main wirings for distributing a dc current entirely to the printed wiring board with a dc voltage drop being depressed, and branch wirings for enhancing high frequency impedance to isolate circuits in terms of high frequency, which circuits are mounted on the multi-layered printed wiring board and operated independently with each other. The invention makes it possible to provide a relatively great inductance to thereby decrease high frequency power supply current which is generated on IC/LSI operation and is to flow into decoupling capacitors. In addition, in accordance with the present invention, it is possible to identify a route through which a current runs into the power supply layer to thereby provide an optimal decoupling capacitor to every IC/LSI as a source of high frequency power supply current.

Multi-layered printed wiring board

A printed board has at least two conductor layers including a power supply layer and a ground layer, and a spiral coil inductor disposed in opposite ones of the conductor layers. The spiral coil inductor has a terminal connected to a power supply line of the power supply layer, and another terminal connected to a device power terminal disposed on one of the conductor layers and to be connected to a power supply terminal of a circuit device and a terminal of a decoupling capacitor. A device ground terminal is disposed on one of the conductor layers and to be connected to a ground terminal of the circuit device and another terminal of the decoupling capacitor, the device ground terminal being connected to a ground line of the ground layer.

Reducing electromagnetic noise radiated from a printed board

An insulative magnetic layer is disposed between a power source conductor layer and a ground conductor layer of a printed-wiring board. Two pieces of conductors are formed by cutting out a part of the power source conductor layer. Another two pieces of conductors are formed by cutting out a part of the ground conductor layer. The former conductors and the latter conductors are connected by five viaholes. A spiral coil inductor of a spiral form is formed in this way. This inductor has the strengthened inductance owing to the insulative magnetic layer provided therein.

Growing community of inventors

Tokyo, Japan

Shiro Yoshida