Applied Materials, Inc.

Shirish A Pethe

Fuhong Zhang

Xianmin Tang

Joung Joo Lee

Xiangjin Xie

Wei Lei

Lanlan Zhong

Yu Lei

Martin Lee Riker

Yi Xu

Kishor Kumar Kalathiparambil

Seshadri Ganguli

Dien-Yeh Wu

Roey Shaviv

Jianshe Tang

Suketu Arun Parikh

Tae Hong Ha

Rui Li

Rong Tao

David Maxwell Gage

Michael Anthony Stolfi

Aixi Zhang

Suhas Bangalore Umesh

Zhimin Qi

Geraldine M Vasquez

Xingyao Gao

Mei Yin Chang

Feng Quan Liu

Rongjun Wang

Adolph Miller Allen

Prashanth Kothnur

Raymond Hoiman Hung

Tao Huang

Goichi Yoshidome

Ben-Li Sheu

Paul Dennis Connors

Preetham P Rao

Da He

Shiyu Yue

Xianyuan Zhao

Andrew Tomko

Lewis Yuan Tse Lo

Sushil Arun Samant

Xiang Chang

Patrick Po-Chun Li

Embodiments of methods and associated apparatus for filling a feature in a substrate are provided herein. In some embodiments, a method of depositing tungsten in features of a substrate includes: depositing a seed layer consisting essentially of tungsten in the features via a physical vapor deposition (PVD) process; and depositing a bulk layer consisting essentially of tungsten in the features via a chemical vapor deposition (CVD) process to fill the features such that the deposition of the bulk layer is selective to within the features as compared to a field region of the substrate, wherein the CVD process is performed by flowing hydrogen gas (H) at a first flow rate and a tungsten precursor at a second flow rate, and wherein the first flow rate is less than the second flow rate.

Self field-suppression CVD tungsten (W) fill on PVD W liner

Methods for reducing resistivity of metal gapfill include depositing a conformal layer in an opening of a feature and on a field of a substrate with a first thickness of the conformal layer of approximately 10 microns or less, depositing a non-conformal metal layer directly on the conformal layer at a bottom of the opening and directly on the field using an anisotropic deposition process. A second thickness of the non-conformal metal layer on the field and on the bottom of the feature is approximately 30 microns or greater. And depositing a metal gapfill material in the opening of the feature and on the field where the metal gapfill material completely fills the opening without any voids.

Methods for forming metal gapfill with low resistivity

Methods of processing a substrate in a PVD chamber are provided herein. In some embodiments, a method of processing a substrate in a PVD chamber, includes: sputtering material from a target disposed in the PVD chamber and onto a substrate, wherein at least some of the material sputtered from the target is guided to the substrate through a magnetic field provided by one or more upper magnets disposed about a processing volume of the PVD chamber above a support pedestal for the substrate in the PVD chamber, one or more first magnets disposed about the support pedestal and providing an increased magnetic field strength at an edge region of the substrate, and one or more second magnets disposed below the support pedestal that increase a magnetic field strength at a central region of the substrate.

Methods for shaping magnetic fields during semiconductor processing

Methods and apparatus for creating a dual metal interconnect on a substrate. In some embodiments, a first liner of a first nitride material is deposited into at least one 1X feature and at least one wider than 1X feature, the first liner has a thickness of less than or equal to approximately 12 angstroms; a second liner of a first metal material is deposited into the at least one 1X feature and at least one wider than 1X feature; the first metal material is reflowed such that the at least one 1X feature is filled with the first metal material and the at least one wider than 1X feature remains unfilled with the first metal material; a second metal material is deposited on the first metal material, and the second metal material is reflowed such that the at least one wider than 1X feature is filled with the second metal material.

Methods and apparatus for forming dual metal interconnects

Embodiments disclosed herein generally relate to methods of depositing a plurality of layers. A doped copper seed layer is deposited in a plurality of feature definitions in a device structure. A first copper seed layer is deposited and then the first copper seed layer is doped to form a doped copper seed layer, or a doped copper seed layer is deposited directly. The doped copper seed layer leads to increased flowability, reducing poor step coverage, overhang, and voids in the copper layer.

Method of depositing multilayer stack including copper over features of a device structure

Methods and apparatus for processing a plurality of substrates are provided herein. In some embodiments, a method of processing a plurality of substrates in a physical vapor deposition (PVD) chamber includes: performing a series of reflow processes on a corresponding series of substrates over at least a portion of a life of a sputtering target disposed in the PVD chamber, wherein a substrate-to-target distance in the PVD chamber and a support-to-target distance within the PVD chamber are each controlled as a function of the life of the sputtering target.

Substrate temperature non-uniformity reduction over target life using spacing compensation

Methods and apparatus for selectively depositing a tungsten layer atop a dielectric surface. In embodiments the method includes: depositing a tungsten layer via a physical vapor deposition (PVD) process atop a substrate field and atop a sidewall and a dielectric bottom surface of a feature disposed in a substrate to form a first tungsten portion having a first thickness atop the substrate field, a second tungsten portion having a second thickness atop the sidewall, and a third tungsten portion having a third thickness atop the dielectric bottom surface, wherein the second thickness is less than the first thickness and third thickness; oxidizing a top surface of the tungsten layer to form a first oxidized tungsten portion atop the substrate field, a second oxidized tungsten portion atop the side wall, and a third oxidized tungsten portion atop the dielectric bottom surface; removing the first oxidized tungsten portion, the second oxidized tungsten portion and the third oxidized tungsten portion, wherein the second tungsten portion is completely removed from the sidewall; and passivating or completely removing the first tungsten portion from the substrate field.

Methods for selective deposition of tungsten atop a dielectric layer for bottom up gapfill

Methods and apparatus for processing a substrate are provided herein. A method, for example, includes igniting a plasma at a first pressure within a processing volume of a process chamber; depositing sputter material from a target disposed within the processing volume while decreasing the first pressure to a second pressure within a first time frame while maintaining the plasma; continuing to deposit sputter material from the target while decreasing the second pressure to a third pressure within a second time frame less than the first time frame while maintaining the plasma; and continuing to deposit sputter material from the target while maintaining the third pressure for a third time frame that is greater than or equal to the second time frame while maintaining the plasma.

Methods and apparatus for processing a substrate

Methods and apparatus for method for filling a feature with copper. In some embodiments, the methods include: (a) depositing a first cobalt layer via a physical vapor deposition (PVD) process atop a substrate field and atop a sidewall and a bottom surface of a feature disposed in a substrate to form a first cobalt portion atop the substrate field and a second cobalt portion atop the sidewall; (b) depositing copper atop the first cobalt portion atop the substrate field; and (c) flowing the copper disposed atop the first cobalt portion atop the substrate field over the second cobalt portion and into the feature, wherein the first cobalt portion atop the substrate field reduces the mobility of copper compared to the mobility of copper over the second cobalt portion.

Methods and apparatus for filling a feature disposed in a substrate

A method of filling structures on a substrate uses a semi-dynamic reflow process. The method may include depositing a metallic material on the substrate at a first temperature, heating the substrate to a second temperature higher than the first temperature wherein heating of the substrate causes a static reflow of the deposited metallic material on the substrate, stopping heating of the substrate, and depositing additional metallic material on the substrate causing a dynamic reflow of the deposited additional metallic material on the substrate. RF bias power may be applied during the dynamic reflow to facilitate in maintaining the temperature of the substrate.

Methods and apparatus for semi-dynamic bottom up reflow

Methods and apparatus for creating a dual metal interconnect on a substrate. In some embodiments, a first liner of a first nitride material is deposited into at least one 1&#xd7; feature and at least one wider than 1&#xd7; feature, the first liner has a thickness of less than or equal to approximately 12 angstroms; a second liner of a first metal material is deposited into the at least one 1&#xd7; feature and at least one wider than 1&#xd7; feature; the first metal material is reflowed such that the at least one 1&#xd7; feature is filled with the first metal material and the at least one wider than 1&#xd7; feature remains unfilled with the first metal material; a second metal material is deposited on the first metal material, and the second metal material is reflowed such that the at least one wider than 1&#xd7; feature is filled with the second metal material.

Methods and apparatus to fill a feature with a seamless gapfill of copper are described. A copper gapfill seed layer is deposited on a substrate surface by atomic layer deposition followed by a copper deposition by physical vapor deposition to fill the gap with copper.

Integration of ALD copper with high temperature PVD copper deposition for BEOL interconnect

Growing community of inventors

Cupertino, CA, United States of America

Shirish A Pethe