Texas Instruments Corporation

Shirin Siddiqui

Amitava Chatterjee

Brian Goodlin

Jong Shik Yoon

Manoj Mehrotra

Patricia Beauregard Smith

Deborah J Riley

Peijun Chen

Trace Quentin Hurd

Sue E Crank

Majid Movahed Mansoori

Karen Hildegard Ralston Kirmse

Karen H R Kirmse

Slim spacers are implemented in transistor fabrication. More particularly, wide sidewall spacers are initially formed and used to guide dopants into source/drain regions in a semiconductor substrate. The wide sidewall spacers are then removed and slim sidewall spacers are formed alongside a gate stack of the transistor. The slim spacers facilitate transferring stress from an overlying pre metal dielectric (PMD) liner to a channel of the transistor, and also facilitate reducing a resistance in the transistor by allowing silicide regions to be formed closer to the channel. This mitigates yield loss by facilitating predictable or otherwise desirable behavior of the transistor.

Slim spacer implementation to improve drive current

According to one embodiment of the invention, a surface preparation method for selective and non-selective epitaxial growth includes providing a substrate having a gate region, a source region, and a drain region, etching a first portion of the source region and the drain region, and removing a second portion of the source region and the drain region by a plasma comprising a noble gas and oxygen.

Surface preparation method for selective and non-selective epitaxial growth

The present invention provides a method for manufacturing a semiconductor device and a method for manufacturing an integrated circuit. The method for manufacturing the semiconductor device, among other steps, includes forming a gate structure () over a substrate (), the gate structure () having L-shaped sidewall spacers () on opposing sidewalls thereof and placing source/drain implants (or) into the substrate () proximate the gate structure (). The method for manufacturing the semiconductor device further includes removing at least a portion of a horizontal segment of the L-shaped sidewall spacers ().

Method for manufacturing a semiconductor device using a sidewall spacer etchback

A method of preparing a die comprises treating exposed silicon to form an oxide prior to silicide formation; and depositing metal on the oxide. The metal may comprise titanium, cobalt, nickel, platinum, palladium, tungsten, molybdenum, or combinations thereof on the oxide. The oxide may be less than or equal to about 15 angstroms thick. In various embodiments, treating exposed silicon to form an oxide comprises forming a non-thermal oxide. Treating exposed silicon to form an oxide may also comprise treating the exposed silicon with an oxidizing plasma; alternatively, treating exposed silicon to form an oxide may comprise forming a chemical oxide. In certain other embodiments, treating exposed silicon to form an oxide comprises treating exposed silicon with a solution comprising ammonium hydroxide, hydrogen peroxide, and water; hydrochloric acid, hydrogen peroxide, and water; hydrogen peroxide; ozone; ozonated deionized water; or combinations thereof.

Treatment of silicon prior to nickel silicide formation

The present invention provides a method for manufacturing a semiconductor device and method for manufacturing an integrated circuit including the semiconductor device. The method for manufacturing a semiconductor device (), among other steps, includes forming a gate structure () over a substrate (), the gate structure () having sidewall spacers (or) on opposing sidewalls thereof and placing source/drain implants () into the substrate () proximate the gate structure (). The method further includes removing at least a portion of the sidewall spacers (or) and annealing the source/drain implants () to form source/drain regions () after removing the at least a portion of the sidewall spacers (or).

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Plano, TX, United States of America

Shirin Siddiqui