Samsung Electronics Co., Ltd.

Shinyoung Yi

Jong-Ryun Choi

Kwanyeob Chae

Ji Hun Oh

Yoonjee Nam

An interface circuit may include a first FIFO circuit and a second FIFO circuit. The first FIFO circuit may generate first output data based on a first sampling signal and a second sampling signal. The second FIFO circuit may generate second output data based on a third sampling signal and a fourth sampling signal. The first FIFO circuit and the second FIFO circuit may be cross-reset.

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Seoul, South Korea

Shinyoung Yi