Fuji Electric Co., Ltd.

Nec Corporation

Shinya Takashima

Katsunori Ueno

Masaharu Edo

Ryo Tanaka

Shizuo Sakamoto

Hideaki Matsuyama

Hideaki Teranishi

Yuki Ohuchi

Takuro Inamoto

Akira Uedono

Daisuke Mori

Yuta Fukushima

Hirotaka Suda

Chizuru Inoue

A method for manufacturing a nitride semiconductor device including: forming N-type regions in a nitride semiconductor layer; implanting ions of an acceptor element into a region sandwiched by the N-type regions in the nitride semiconductor layer; and forming a P-type region sandwiched by the N-type regions by subjecting the nitride semiconductor layer to heat treatment and activating the acceptor element. The forming the N-type regions includes implanting ions of a donor element to the nitride semiconductor layer such that concentration of the donor element in the N-type regions is equal to or greater than concentration of the acceptor element in the P-type region. The implanting ions of the acceptor element includes implanting ions of the acceptor element such that concentration of the acceptor element in the P-type region is 1×10cmor more and 1×10cmor less.

Method for manufacturing nitride semiconductor device and nitride semiconductor device

A method for manufacturing a nitride semiconductor device including: forming an N-type region in a nitride semiconductor layer; implanting ions of an acceptor element into a region under the N-type region in the nitride semiconductor layer; and forming a first P-type region under the N-type region by subjecting the nitride semiconductor layer to heat treatment and activating the acceptor element. The forming the N-type region includes implanting ions of a donor element into the nitride semiconductor layer such that concentration of the donor element in the N-type region is equal to or greater than concentration of the acceptor element in the first P-type region. The implanting ions of the acceptor element into a region under the N-type region includes implanting ions of the acceptor element such that concentration of the acceptor element in the first P-type region is 1×10cmor more and 1×10cmor less.

A method for manufacturing a nitride semiconductor device includes: selectively ion-implanting an element that is other than p-type impurities and n-type impurities into a first region in a first primary surface of a gallium nitride layer so as to generate crystal defects in the first region; selectively ion-implanting a p-type impurity into a second region in the gallium nitride layer, the second region being shallower than the first region in a depth direction and being within the first region in a plan view; and thermally treating said gallium nitride layer that has been ion-implanted with said element and said p-type impurity so as to thermally diffuse said p-type impurity in the second region into a third region that is within the first region and that surrounds a bottom and sides of the second region.

Nitride semiconductor device

A nitride semiconductor device is provided, comprising: a first nitride semiconductor layer of a first conductivity-type; a second nitride semiconductor layer of a second conductivity-type provided above the first nitride semiconductor layer; a junction region of a first conductivity-type which is provided to extend in a direction from a front surface of the second nitride semiconductor layer to the first nitride semiconductor layer and has a doping concentration Nequal to or higher than that of the first nitride semiconductor layer; and a source region of a first conductivity-type which is provided more shallowly than the junction region and has a doping concentration equal to or higher than the doping concentration N, wherein a dopant of the source region is an element with an atomic weight larger than that of a dopant in the junction region.

Nitride semiconductor device and method for fabricating nitride semiconductor device

A gallium nitride based semiconductor device is provided, where when a thickness of a transition layer is defined as the followings, the thickness of the transition layer is less than 1.5 nm: (i) a distance between a depth position at which an atomic composition of nitrogen element constituting the gallium nitride based semiconductor layer is &#xbd; relative to that at a position on the GaN based semiconductor layer side sufficiently away from the transition layer, and a depth position at which an atomic composition of a metal element is &#xbd; of a value of a maximum if an atomic composition of the metal element constituting an insulating layer has the maximum, or a depth position at which an atomic composition of the metal element is &#xbd; relative to that at a position on the insulating layer side sufficiently away from the transition layer if not having the maximum.

Gallium nitride based semiconductor device and manufacturing method of gallium nitride based semiconductor device

According to at least one example embodiment of the present invention, provided is a face authentication system including: a criterion setting unit that sets a criterion of face authentication performed on a user so as to be different in accordance with a state of an access target system accessed by the user; and a face authentication unit that performs face authentication of the user based on the criterion.

Face authentication system, face authentication method, biometrics authentication system, biometrics authentication method, and storage medium

A nitride semiconductor device is provide, the nitride semiconductor device including: an epitaxial layer; and an ion implantation layer that is provided on the epitaxial layer over a continuous depth range that extends over 100 nm or longer, and has a P type doping concentration equal to or higher than 1&#xd7;10cm, wherein the ion implantation layer has a region with a crystal defect density equal to or lower than 1&#xd7;10cm, the region being located in a range which is on an upper-surface-side of an interface between the epitaxial layer and the ion implantation layer, and is within 100 nm from the interface.

A manufacturing method of a vertical GaN-based semiconductor device having: a GaN-based semiconductor substrate; a GaN-based semiconductor layer including a drift region having doping concentration of an n type impurity, which is lower than that of the GaN-based semiconductor substrate, and is provided on the GaN-based semiconductor substrate; and MIS structure having the GaN-based semiconductor layer, an insulating film contacting the GaN-based semiconductor layer, and a conductive portion contacting the insulating film, the method includes: implanting an n type dopant in a back surface of the GaN-based semiconductor substrate after forming of the MIS structure, and annealing the GaN-based semiconductor substrate after the implanting of the n type dopant.

Manufacturing method of vertical GaN-based semiconductor device and vertical GaN-based semiconductor device

Provided is a manufacturing method of a semiconductor device including a vertical MOSFET having a planar gate. The manufacturing method of a semiconductor device includes forming a n-type gallium nitride layer on a gallium nitride monocrystalline substrate, and forming an impurity-implanted region that contains impurities at a uniform concentration in a direction parallel to a main surface of the gallium nitride monocrystalline substrate, by ion-implanting the impurities into the n-type gallium nitride layer, where the impurities include at least one type selected from among magnesium, beryllium, calcium and zinc. Here, at least part of the impurity-implanted region serves as a channel forming region of the vertical MOSFET.

Manufacturing method of semiconductor device and semiconductor device

A diode is provided, the diode including: a semiconductor layer of a first conductivity type, configured to have a trench structure and be an epitaxial layer of a wide gap semiconductor; a semiconductor layer of a second conductivity type, configured to be at least in contact with a side wall of the trench structure and be an epitaxial layer of the wide gap semiconductor; and an electrode configured to be in contact with the semiconductor layer of the first conductivity type and the semiconductor layer of the second conductivity type, on the semiconductor layer of the first conductivity type and the semiconductor layer of the second conductivity type.

Diode and method of manufacturing diode

Provided is a semiconductor device including at least two isolation trench portions; a mesa region that is provided between the at least two isolation trench portions and includes a source region having a first conduction type, a base region having a second conduction type and at least a portion thereof provided below the source region, and a gate trench portion; and a contact layer that is an epitaxial layer provided at least in contact with side portions of the mesa region and bottom portions of the isolation trench portions positioned lower than the gate trench portion, and having a second-conduction-type impurity concentration higher than that of the base region, wherein the same impurities as in the contact layer are present in the source region, or the contact layer is provided higher than the source region.

Semiconductor device and manufacturing method of semiconductor device

A vertical semiconductor apparatus includes: a gallium nitride substrate; a gallium nitride semiconductor layer on the gallium nitride substrate; a p-type impurity region in the gallium nitride semiconductor layer and having an element to function as an acceptor for gallium nitride; an n-type impurity region in the p-type impurity region and having an element to function as a donor for gallium nitride; and an electrode provided contacting a rear surface of the gallium nitride substrate. The element to function as the donor in the n-type impurity region includes: a first impurity element to enter sites of gallium atoms in the gallium nitride semiconductor layer; and a second impurity element different from the first impurity element and to enter sites of nitrogen atoms in the gallium nitride semiconductor layer. In the n-type impurity region, a concentration of the first impurity element is higher than that of the second impurity element.

Semiconductor device and method of manufacturing semiconductor device

In order to improve the dynamic characteristics of a vertical MOSFET using GaN, it is an objective of the present invention to reduce the resistance of a current path with a long hole movement distance in a p-type well. Provided is a vertical MOSFET including a gallium nitride layer having a main surface that is a non-polar surface; a p-type well region that is provided with a stripe shape in the main surface of the gallium nitride layer; and a stripe-shaped electrode provided above the p-type well region. Hole mobility is higher in a direction orthogonal to an extension direction of the stripe-shaped electrode than in the extension direction, among directions in a plane parallel to the main surface.

Growing community of inventors

Hachioji, Japan

Shinya Takashima