Hitachi, Ltd.

Hitachi Denshi Kabushiki Kaisha

Hitachi Device Engineering Co., Ltd.

Shinya Ohba

Iwao Takemoto

Haruhisa Ando

Toshifumi Ozaki

Masaharu Kubo

Masaaki Nakai

Masakazu Aoki

Norio Koike

Hajime Akimoto

Toshiyuki Akiyama

Takuya Imaide

Kenji Takahashi

Shoji Hanamura

Shuhei Tanaka

Hideyuki Ono

Toru Baji

Ryuichi Izawa

Toshiaki Masuhara

Naoki Ozawa

Toshihisa Tsukada

Susumu Narita

Kouki Noguchi

Koichi Seki

Makoto Ohkura

Osamu Minato

Michio Masuda

Yasuo Wada

Shigeru Shimada

Morishi Izumita

Tatsuji Matsuura

Yoshimune Hagiwara

Shusaku Nagahara

Masatada Horiuchi

Masaru Noda

Haruo Matsumaru

Kiyokazu Nishioka

Takahiro Okabe

Itaru Mimura

Chushirou Kusano

Hiroaki Nabeyama

Takashi Tokuyama

Akihide Okuda

Toshiro Tsukada

Hirotsugu Kojima

Hirotsugu Kozuka

Shuusaku Nagahara

Kyotake Uchiumi

Mitsuyuki Mitsui

Syoji Hanamura

Yataro Yamashita

Tamura Hiroshi

Tamura Masao

Nario Sumi

Harushisa Ando

Hajime Kinugasa

A logic LSI has a plurality of modules such as a CPU contained in one chip. Frequency changing conditions, signals for designating modules whose frequencies are changed for each frequency changing condition, and signals for designating frequencies to be changed are stored in a storage device of a frequency controller, software-wise. The sequentially-input status of the logic LSI is compared with the stored frequency changing conditions and, when the former conforms to the latter, a signal for changing the corresponding frequency is applied to each of the plurality of modules. Each of the modules generates a plurality of internal clocks in synchronization with the basic clock and selects one out of the internal clocks according to the frequency changing signal.

Logic LSI

The present invention relates to an improved solid-state imaging device having pixel amplifiers. The higher definition of the device results in the increase in number of pixels as large as not less than two million. When a solid-state imaging device having such a large number of pixels is provided with pixel amplifiers, there arise various problems associated with a power source and a power supply line as well as a problem inherent to the pixel amplifier type of solid-state imaging device. The present invention provides a solid-state imaging device in which noises or the like are prevented and a picture or image quality having high definition can be obtained, by suppressing a voltage drop of the power supply line and by compensating fluctuations in outputs of the pixel amplifiers.

Solid-state image array with simultaneously activated line drivers

A solid-state imaging device has a plurality of light receiving elements formed in a semiconductor substrate. Signal electric charges generated by light incident upon the light receiving elements and stored in the individual light receiving elements are sequentially read out through signal lines by scanning a plurality of switches. Each of the switches includes a series connection of a first MOS transistor switching element formed in the semiconductor substrate and a second MOS transistor formed in a semiconductor provided above the semiconductor substrate through an insulator. The first switching element is disposed on the side of the light receiving element and the second switching element is disposed on the side of the signal output terminal.

Solid-state imaging device having series-connected pairs of switching

A solid-state imaging device has a plurality of photodiodes (photoelectric conversion elements) formed in a surface of a semiconductor substrate in a matrix configuration and reading means for reading out signal charges stored in the photodiodes in accordance with the incident lights in a predetermined order. This reading means includes active elements, such as MOS type transistors, connected to each of the photodiodes. A MOS type transistor constituting part of theses active elements is provided in the path of the transmitting incident light for the associated photodiode. By this configuration, the area occupied by one picture element is reduced as far as the processing steps allow.

Solid-state imaging device including photoelectric conversion elements

A digital signal processor for computing a vector product between a column vector input signal including a plurality of data items (x0, x1, x2, . . . , x7) and a matrix including a predetermined number of coefficient data items so as to produce a column vector output signal including a plurality of data items (y0, y1, y2, . . . , y7). In a first cycle, the leading data x0 of the column vector input signal is stored in a first store unit (Rin), whereas during this period of time, in a second cycle shorter in time than the first cycle, the data items (c0, c1, c2, . . . , c7) in the row direction constituting a first portion of the matrix are sequentially read out such that both data items are multiplied, thereby storing the multiplication results in an accumulator. A similar data processing is repeatedly executed so as to obtain, based on the outputs from the accumulator, a column vector output signal constituted by the plurality of data items (y0, y1, y2, . . . , y7).

High speed digital signal processor capable of achieving realtime

A solid-state imaging device including a plurality of photoelectric conversion elements (for example, photodiodes) arranged on a semiconductor substrate so as to form a matrix and read-out means for reading out signal charges which are stored in the photodiodes in accordance with incident light, in a predetermined order, is disclosed in which device the read-out means is made up of a plurality of active elements such as a MOS transistor connected to a photodiode, part of the active elements are used as a pixel amplifier for amplifying the signal charge of the photodiode in such a manner that the signal charge is converted into a current or voltage, the output of the pixel amplifier at a time the signal charge of the photodiode is not applied to the input part of the pixel amplifier and the output of the pixel amplifier at a time the signal charge of the photodiode is applied to the input part of the pixel amplifier are separately stored in a pair of storage means, and the outputs of a plurality of pairs of storage means are successively taken out in accordance with a scanning signal.

Solid-state imaging device having photo-electric conversion elements and

A solid-state imaging device includes a vertical CCD shift register for transferring electric charge. The electrode of the vertical CCD located nearest to the substrate is extended outside of the region of the vertical CCD to a region of a layer where isolation is required. The layer is thus imparted with two functions, that is, the function of the CCD electrode and that of the iolation electrode. An overflow transistor is also provided to discharge excess charge produced by high intensity light.

Solid-state imaging device

A high resolution solid-state color imaging apparatus having two-dimensionally disposed photoelectric sensors are arranged in rows and columns each having a color spectral responsivity characteristic such as by employing color filters. Each of the photoelectric sensors is scanned so as to obtain an intensity signal with respect to each row of each field, and wherein scanning of each field is for the same number of rows as that of each frame. Intensity signals are obtained only by the scanned output of each row. Additional intensity signals equal to half the number of said first mentioned intensity signals are obtained by a 2:1 subsampling of bandwidth-restricted signals by a filter along the vertical temporal frequency, thereby realizing high vertical resolution by the photoelectric image sensors of conventional row numbers and having compatibility with a conventional NTSC system and, furthermore, eliminating aliasing distortion.

Solid-state color imaging apparatus for extended definition television

Vertical CCD registers constituting parts of an interline type CCD imaging device hold independently the signal charges transferred from photoelectric conversion elements and having different storage durations. Transfer of charge to the vertical CCD registers from the photoelectric conversion element is performed at least twice during one field period. The vertical CCD registers transfer the signal charges of different storage durations independent of one another.

According to the present invention, the number of elements of a signal processing circuit or the like can be drastically reduced by conducting a time-multiplex processing. In a transversal filter having a coefficient of symmetry of 16 taps, for example, the prior art requires about 58,000 transistors. In case four signal processing cores (i.e., SPC) having a function of four taps are used, the number of transistors required can be reduced to about 34,000 by a duplexing process. In case two SPCs having a function of eight taps are used, the number can be reduced to about 19,000 by a quadplexing process. In case, moreover, one SPC having a function of sixteen taps is used, the number can be reduced to about 13,000 by an octaplexing process. Here, the reason why the number of elements is not halved even if the number of the SPCs is halved is that the number of elements to be used in control circuits, memories and so on increases.

Digital video signal processor

A solid-state imaging device having a plurality of semiconductor layers of a first conductivity type for photo-electric conversion provided on the surface of a first semiconductor layer of a second conductivity type which is formed on a part of one surface of a semiconductor substrate of the first conductivity type, a semiconductor layer of the first conductivity type for charge transfer provided on the surface of a second semiconductor layer of the second conductivity type which is formed on a part of the surface of the substrate, and a signal output means. The first semiconductor layer of the second conductivity type and the second semiconductor layer of the second conductivity type are formed in different steps so that the first semiconductor layer is disposed deeper than the second semiconductor layer.

A solid-state imaging device is constructed by integrating a plurality of face plate elements of an imager in the shape of a matrix on a semiconductor substrate. The face plate elements are formed of photodiodes, in which charges corresponding to incident light are accumulated. The charges are converted into currents or voltages by a plurality of amplifying means disposed in the matrix and which are provided adjacent to the photodiodes. The currents or the voltages obtained through conversion are delivered out of the matrix through signal lines. To the signal lines a correlated double sampling circuit is connected, and this curcuit detects a difference in outputs of the amplifying means between a case when the charges of the photodiodes are not present in the input portions of the amplifying means and a case when they are present therein.

Solid-state imaging device having an amplifying means in the matrix

A charge transfer type solid-state device incorporating a charge coupled device (CCD). In order to eliminate field after image and smear, at least two electrode pairs are provided in a vertical CCD shift register for transferring the signal charges stored in photoelectric conversion elements, the electrode pairs being disposed within the vertical pitch of the photoelectric conversion elements. P

Charge transfer type solid-state imaging device

This invention relates to an area imaging device having an array of picture elements formed of photodiodes and insulated-gate MOSTs which is vertically scanned by a shift register and horizontally scanned by a charge transfer device (CTD). The solid-state imaging device according to this invention has a transfer MOST provided between a vertical signal output line and a horizontal switch MOST, a resetting MOST connected to the junction between said transfer MOST and the horizontal switch MOST, and a mechanism for setting the vertical signal line at a reference potential just before signal transfer. The transfer MOST connected between the junction of the horizontal switch MOST and the resetting MOST and the vertical signal line is a double-gate MOST formed of a series connection of a transfer gate and another transfer gate. Therefore, the charges under the gate of the transfer MOST can be removed for fixed noise to be greatly reduced.

Herein disclosed is a semiconductor device having at least one lower resistance region formed in the single-crystalline semiconductor film which is so formed to continuously coat both a single-crystalline semiconductor substrate and an insulating film formed on the surface of the substrate. Since the aforementioned single-crystalline semiconductor film is used, many advantages which are not attained from the semiconductor device according to the prior art can be obtained. The aforementioned single-crystalline semiconductor film is formed by irradiating a polycrystalline or amorphous semiconductor film with a laser beam.

Method of making three dimensional semiconductor devices in selectively

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Kanagawa, Japan

Shinya Ohba