Kioxia Corporation

Shinya Naito

Keiji Hosotani

Fumitaka Arai

Ryo Fukuoka

Kouji Matsuo

Hiroaki Kosako

Takayuki Kakegawa

A semiconductor memory device includes a memory cell array and a peripheral circuit. The peripheral circuit includes a plurality of first nodes disposed corresponding to a plurality of first via electrodes, a charging circuit that charges the plurality of first nodes, a discharging circuit that discharges the plurality of first nodes, an address select circuit that electrically conducts one of the plurality of first nodes with the charging circuit or the discharging circuit in response to an input address signal, a plurality of first transistors each disposed in a current path between two of the plurality of first nodes, and a plurality of amplifier circuits that are disposed corresponding to the plurality of first via electrodes and include input terminals connected to any of the plurality of first nodes and output terminals connected to any of the plurality of first via electrodes.

Semiconductor memory device

A semiconductor device includes first and second gate electrodes, a semiconductor layer between the first and second gate electrodes and extending along a first direction, a first gate insulating layer between the first gate electrode and the semiconductor layer, a second gate insulating layer between the second gate electrode and the semiconductor layer, a first insulating layer including a first region adjacent to the first gate electrode in the first direction and contacting the semiconductor layer, and a second insulating layer extending including a second region adjacent to the second gate electrode in the first direction and contacting the semiconductor layer. An interface between the first region and the semiconductor layer in a direction crossing the first direction is adjacent to the first gate electrode in the first direction.

Semiconductor device and semiconductor storage device

Growing community of inventors

Toyota Aichi, Japan

Shinya Naito