Semiconductor Components Industries, LLC

Sandisk Technologies Inc.

Shinya Inoue

Yasuhiro Takeda

Yuzo Otsuru

Michiaki Sano

Fumitaka Amano

Kensuke Ishikawa

Shigeyuki Sugihara

A semiconductor device includes a silicon surface, a titanium silicide layer contacting the silicon surface, a first titanium nitride layer located over the titanium silicide layer, a titanium oxynitride layer contacting the first titanium nitride layer, a second titanium nitride layer contacting the titanium oxynitride layer, and a metal fill layer located over the second titanium nitride layer.

Semiconductor device containing multilayer titanium nitride diffusion barrier and method of making thereof

The invention provides an LDMOS transistor of which the time-dependent degrading of the performance due to the trapping of hot electrons in the gate insulation film is decreased. A body layer is disposed in a surface portion of an N&#x2212; type semiconductor layer. A source layer including an N&#x2212; type layer is disposed in a surface portion of the body layer. An N&#x2212; type drift layer is formed in a surface portion of the N&#x2212; type semiconductor layer. This drift layer includes a first region having a first N type impurity concentration peak region and a second region having a second N type impurity concentration peak region that is positioned deeper than the first N type impurity concentration peak region, the second region adjoining this first region. An N+ type drain layer is formed in a surface portion of the second region.

Semiconductor device and method of manufacturing the same

The invention provides an LDMOS transistor of which the time-dependent degrading of the performance due to the trapping of hot electrons in the gate insulation film is decreased. A body layer is disposed in a surface portion of an N&#x2212;&#x2212; type semiconductor layer. A source layer including an N&#x2212; type layer is disposed in a surface portion of the body layer. An N&#x2212; type drift layer is formed in a surface portion of the N&#x2212;&#x2212; type semiconductor layer. This drift layer includes a first region having a first N type impurity concentration peak region and a second region having a second N type impurity concentration peak region that is positioned deeper than the first N type impurity concentration peak region, the second region adjoining this first region. An N+ type drain layer is formed in a surface portion of the second region.

A semiconductor device equally turns on the parasitic bipolar transistors in the finger portions of the finger form source and drain electrodes when a surge voltage is applied, even with the P+ type contact layer surrounding the N+ type source layers and the N+ type drain layers connected to the finger form source and drain electrodes. A P+ type contact layer surrounds N+ type source layers and N+ type drain layers. Metal silicide layers are formed on the N+ type source layers, the N+ type drain layers, and a portion of the P+ type contact layer. Finger form source electrodes, finger form drain electrodes, and a P+ type contact electrode surrounding these finger form electrodes are formed, being connected to the metal silicide layers respectively through contact holes formed in an interlayer insulation film deposited on the metal silicide layers.

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Yokkaichi, Japan

Shinya Inoue