Sumitomo Electric Industries, Limited

Shinya Fujiwara

Yasuaki Higuchi

Tomoaki Miyoshi

Takayuki Nishiura

Mitsutaka Tsubokura

Kenichi Miyahara

An InP substrate, being a group III-V compound semiconductor substrate, that includes, on a main surface thereof, 0.22 particles/cmthat have a particle diameter of at least 0.19 &#x3bc;m or 20 particles/cmthat have a particle diameter of 0.079 &#x3bc;m. An InP substrate with an epitaxial layer, being a group III-V compound semiconductor substrate with an epitaxial layer, includes: the InP substrate and an epitaxial layer arranged upon the main surface of the InP substrate; and, upon the main surface thereof when the thickness of the epitaxial layer is 0.3 &#x3bc;m, no more than 10 LPD that have a circle-equivalent diameter of at least 0.24 &#x3bc;m, per cm, or no more than 30 LPD that have a circle-equivalent diameter of at least 0.136 &#x3bc;m, per cm. As a result, a group III-V compound semiconductor substrate capable of reducing defects in an epitaxial layer grown upon a main surface thereof and a group III-V compound semiconductor substrate with an epitaxial layer are provided.

Group III-V compound semiconductor substrate and group III-V compound semiconductor substrate with epitaxial layer

A GaAs substrate has a first surface. The sum of the number of particles having a longer diameter of more than or equal to 0.16 &#x3bc;m which are present in the first surface, per cmof the first surface, and the number of damages having a longer diameter of more than or equal to 0.16 &#x3bc;m which are present in a second surface, per cmof the second surface, is less than or equal to 2.1, the second surface being formed by etching the first surface by 0.5 &#x3bc;m in a depth direction.

GaAs substrate and method for manufacturing the same

An InP substrate that is a group III-V compound semiconductor substrate includes particles of greater than or equal to 0.19 &#x3bc;m in particle size at less than or equal to 0.22 particles/cmor particles of greater than or equal to 0.079 &#x3bc;m in particle size at less than or equal to 20 particles/cmon the main surface. An epilayer-attached InP substrate that is an epilayer-attached group III-V compound semiconductor substrate includes the InP substrate mentioned above and an epitaxial layer disposed on the main surface of the InP substrate, and includes LPDs of greater than or equal to 0.24 &#x3bc;m in circle-equivalent diameter at less than or equal to 10 defects/cmor LPDs of greater than or equal to 0.136 &#x3bc;m in circle-equivalent diameter at less than or equal to 30 defects/cmon the main surface in a case where the epitaxial layer has a thickness of 0.3 &#x3bc;m.

An indium phosphide substrate, a method of inspecting thereof and a method of producing thereof are provided, by which an epitaxial film grown on the substrate is rendered excellently uniform, thereby allowing improvement in PL characteristics and electrical characteristics of an epitaxial wafer formed using this epitaxial film. The indium phosphide substrate has a first main surface and a second main surface, a surface roughness Ra1 at a center position on the first main surface, and surface roughnesses Ra2, Ra3, Ra4, and Ra5 at four positions arranged equidistantly along an outer edge of the first main surface and located at a distance of 5 mm inwardly from the outer edge. An average value mof the surface roughnesses Ra1, Ra2, Ra3, Ra4, and Ra5 is 0.5 nm or less, and a standard deviation &#x3c3;1 of the surface roughnesses Ra1, Ra2, Ra3, Ra4, and Ra5 is 0.2 nm or less.

Indium phosphide substrate, method of inspecting indium phosphide substrate, and method of producing indium phosphide substrate

An indium phosphide substrate, a method of inspecting thereof and a method of producing thereof are provided, by which an epitaxial film grown on the substrate is rendered excellently uniform, thereby allowing improvement in PL characteristics and electrical characteristics of an epitaxial wafer formed using this epitaxial film. The indium phosphide substrate has a first main surface and a second main surface, a surface roughness Raat a center position on the first main surface, and surface roughnesses Ra, Ra, Ra, and Raat four positions arranged equidistantly along an outer edge of the first main surface and located at a distance of 5 mm inwardly from the outer edge. An average value mof the surface roughnesses Ra, Ra, Ra, Ra, and Rais 0.5 nm or less, and a standard deviation &#x3c3;of the surface roughnesses Ra, Ra, Ra, Ra, and Rais 0.2 nm or less.

An object is to provide a compound semiconductor substrate and a surface-treatment method thereof, in which, even after the treated substrate is stored for a long period of time, resistance-value defects do not occur. Even when the compound semiconductor substrate is stored for a long period of time and an epitaxial film is then formed thereon, electrical-characteristic defects do not occur. The semiconductor substrate according to the present invention is a compound semiconductor substrate at least one major surface of which is mirror-polished, the mirror-polished surface being covered with an organic substance containing hydrogen (H), carbon (C), and oxygen (O) and alternatively a compound semiconductor substrate at least one major surface of which is mirror-finished, wherein a silicon (Si) peak concentration at an interface between an epitaxial film grown at a growth temperature of 550&#xb0; C. and the compound semiconductor substrate is 2&#xd7;10cmor less.

Growing community of inventors

Itami, Japan

Shinya Fujiwara