Hitachi, Ltd.

Shintaroh Sato

Akio Shima

Masahiro Masunaga

Naoki Watanabe

Naoki Tega

Ryo Kuwana

Digh Hisamoto

Isao Hara

The purpose of the present invention is to provide a semiconductor device comprising an epitaxial layer formed on a SiC substrate, and a CMOS formed in the top part of the epitaxial layer, wherein growth of any defects present at the interface between the SiC substrate and the epitaxial layer is suppressed, and the reliability of the semiconductor device is improved. As a means to achieve the foregoing, a semiconductor device is formed such that the distance from a p-type diffusion layer to the interface between an n-type epitaxial layer and an n-type semiconductor substrate is larger than the thickness of a depletion layer that extends from the p-type diffusion layer to the back side of the n-type semiconductor substrate in response to the potential difference between a substrate electrode and another substrate electrode.

Semiconductor device, method of manufacturing same, and sensor

An n type semiconductor layer is formed over an n type semiconductor substrate made of silicon carbide, a p type impurity region is formed in the semiconductor layer, and an n type drain region and an n type source region are formed in the impurity region. A field insulating film having an opening that selectively opens a part of the impurity region located between the drain and source regions is formed over the impurity region and the drain and source regions. A gate insulating film is formed over the impurity region in the opening, and a gate electrode is formed on the gate insulating film. Here, a field relaxation layer having an impurity concentration higher than that of the impurity region is formed in at least a part of the impurity region located between the drain and source regions in plan view and located below the field insulating film.

Semiconductor device, manufacturing method thereof, and pressure transmitter using semiconductor device

A MOSFET that has a drain region and a source region on an upper surface of a semiconductor substrate and a gate electrode that is formed on the semiconductor substrate, and an element separation insulating film that includes an opening portion which exposes an active region, on the semiconductor substrate, are formed. At this point, a gate leading-out interconnection that overlaps the element separation insulating film when viewed from above, and that is integrally combined with the gate electrode is formed in a position where the gate leading-out interconnection does not extend over a distance between both the drain region and the source region when viewed from above, on a region that is exposed from the gate electrode.

Semiconductor device and method of manufacturing the same

There is provided a semiconductor device that improves reliability. The impurity concentrations of a psource region and a pdrain region are 5&#xd7;10cmor more. The channel-region-side end portion of a first insulating film is disposed on a psource region. The end portion has an inclined surface where the first insulating film thickness is reduced from the psource region toward a channel region. The channel-region-side end portion of a second insulating film is disposed on a pdrain region. The end portion has an inclined surface where the second insulating film thickness is reduced from the pdrain region toward the channel region. A gate electrode is disposed on the channel region, the psource region, the pdrain region, and the inclined surfaces of the first and the second insulating films through a gate insulating film including an aluminum oxide film.

Semiconductor device and method of manufacturing semiconductor device

An object of the present invention is to provide high-performance highly-reliable power semiconductor device. The semiconductor device according to the present invention is provided with a first conductive type semiconductor substrate, a drain electrode formed on a back side of the semiconductor substrate, a drift layer of the first conductive type formed on a surface side of the semiconductor substrate, a source area of the first conductive type, a current diffused layer of the first conductive type, a body layer of a second conductive type reverse to the first conductive type in contact with the source area and the current diffused layer, a trench which pierces the source area, the body layer and the current diffused layer, which is shallower than the body layer, and the bottom of which is in contact with the body layer, a high-concentration JFET layer of the first conductive type formed up to a deeper position than a boundary between the current diffused layer and the body layer, electrically connecting the drift layer and the current diffused layer, and having higher impurity concentration than the drift layer, a gate insulating film formed on an inner wall of the trench, and a gate electrode formed on the gate insulating film.

Semiconductor device and method for manufacturing same, power conversion device, three-phase motor system, automobile, and railway carriage

An object of the present invention is to provide high-performance highly-reliable power semiconductor device. The semiconductor device according to the present invention is provided with a semiconductor substrate of a first conductive type, a drain electrode formed on a back side of the semiconductor substrate, a drift layer of the first conductive type formed on a semiconductor substrate, a source area of the first conductive type, a current-diffused layer of the first conductive type electrically connected to the drift layer, a body layer of a second conductive type reverse to the first conductive type in contact with the source area and the current-diffused layer, a trench which pierces the source area, the body layer and the current-diffused layer, which is shallower than the body layer, and the bottom of which is in contact with the body layer, a gate insulating film formed on an inner wall of the trench, a gate electrode formed on the gate insulating film, and a gate insulating film protective layer formed between the current-diffused layer and the gate electrode.

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Tokyo, Japan

Shintaroh Sato