Freescale Semiconductor,inc.

Shintaroh Murakami

Kanji Egawa

Masami Aiura

Hidetaka Fukazawa

Konosuke Taki

A circuit and a method for reducing output noise when a pulse width modulation mode is started. A pulse width modulation circuit generates a first pulse signal having a duty cycle that is in accordance with an output voltage of a regulator circuit. A drive circuit generates the output voltage from an input voltage in response to the first pulse signal provided from the pulse width modulation circuit. A feed forward circuit controls the pulse width modulation circuit in a manner to generate the first pulse signal having a duty cycle that maintains the output voltage at a desired level before the pulse width modulation circuit provides the first pulse signal to the drive circuit.

Circuit and method for reducing output noise of regulator

A pulse width modulation (PWM) wave output circuit that efficiently and accurately outputs dual PWM waves includes two comparators, an OR circuit, and an AND circuit. A voltage generator supplies the comparators with ramp voltages having the same wave height and shifted phases. The comparator compares the ramp voltages with the reference voltage and provides the comparison results to the OR circuit and the AND circuit. The OR circuit outputs a first modulation wave, and the AND circuit generates a second modulation wave. Accordingly, modulation waves having different duties are output based on ramp voltage having different phases.

Pulse width modulation wave output circuit

A discharge device and DC power supply system for preventing erroneous operation of a series regulator. The discharge circuit includes a voltage comparison circuit for comparing input power supply voltage and output power supply voltage of the series regulator. The voltage comparison circuit includes first and second transistors. The collector terminal of the second transistor is connected to the drain terminal of a fourth transistor and to the gate terminal of a fifth transistor. The fifth transistor has a drain terminal, which is connected to the output terminal of the series regulator, and a source terminal, which is grounded. Third and fourth transistors operate when the input power supply voltage is greater than the activation voltage. The drain terminal of the fourth transistor is grounded via a resistor, and the voltage of the fourth transistor is supplied to the gate terminal of the fifth transistor.

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Yokohama, Japan

Shintaroh Murakami