Sony Semiconductor Solutions Corporation

Shintaro Okamoto

Shigetaka Mori

Chihiro Tomita

Shinya Sato

Nobutoshi Fujii

Koichiro Zaitsu

Shuji Manda

Yoshiaki Kitano

Naohiko Kimizuka

Shinichi Miyake

Keiichi Nakazawa

Katsunori Hiramatsu

Keiji Ohshima

Hirofumi Yamashita

Naoki Saka

Junpei Yamamoto

Shinji Nakagawa

Yohei Hiura

Yusuke Kohyama

Yuya Maeda

Tomohiro Hirai

Kentaro Eda

Takashi Watanabe

Kazuki Yamaguchi

Kohei Suzuki

Norikazu Kasahara

Yasushi Hamamoto

Tomoki Kambe

Ryo Ogata

Tatsuki Miyaji

Yui Yuga

An imaging device according to embodiments of the present disclosure includes: a first semiconductor substrate provided with a photoelectric conversion element, floating diffusion that temporarily holds a charge output from the photoelectric conversion element, and a transfer transistor that transfers the charge output from the photoelectric conversion element to the floating diffusion; and a second semiconductor substrate provided on the first semiconductor substrate via a first interlayer insulating film and provided with a readout circuit unit that reads out the charge held in the floating diffusion and outputs a pixel signal.

Imaging device

An imaging device according to an embodiment of the present disclosure includes: a first substrate including a sensor pixel that performs photoelectric conversion; a second substrate including a pixel circuit that outputs a pixel signal on a basis of electric charges outputted from the sensor pixel; and a third substrate including a processing circuit that performs signal processing on the pixel signal. The first substrate, the second substrate, and the third substrate are stacked in this order, and a concentration of electrically-conductive type impurities in a region on side of the first substrate is higher than a concentration of electrically-conductive type impurities in a region on side of the third substrate, in at least one or more semiconductor layers in which a field-effect transistor of the pixel circuit is provided.

There is provided a solid-state imaging device including: a first semiconductor layer including a photoelectric converter and an electric charge accumulation section for each pixel, the electric charge accumulation section in which a signal electric charge generated in the photoelectric converter is accumulated; a pixel separation section that is provided in the first semiconductor layer, and partitions a plurality of the pixels from each other; a second semiconductor layer that is provided with a pixel transistor and is stacked on the first semiconductor layer, the pixel transistor that reads the signal electric charge of the electric charge accumulation section; and a first shared coupling section that is provided between the second semiconductor layer and the first semiconductor layer, and is provided to straddle the pixel separation section and is electrically coupled to a plurality of the electric charge accumulation sections.

Solid-state imaging device

The present disclosure relates to a semiconductor device, a solid-state imaging device, and a method for manufacturing a semiconductor device capable of improving the voltage dependency of a gate capacitance type. Provided is a semiconductor device having a laminated structure in which a compound layer formed on a surface of a semiconductor layer and formed by the semiconductor layer reacting with metal, an insulating film layer in contact with the compound layer, and an electrode layer formed on the insulating film layer are laminated. The present technology can be applied, for example, to an analog-to-digital (AD) conversion part included in the solid-state imaging device.

Semiconductor device, solid-state imaging device, and method for manufacturing semiconductor device

The capacity of a MOS capacitor is increased. A semiconductor element includes a first semiconductor region, an insulation film, a gate electrode, and a second semiconductor region. The first semiconductor region is arranged on a semiconductor substrate and has a recess on the surface. The insulation film is arranged adjacent to the surface of the first semiconductor region. The gate electrode is arranged adjacent to the insulation film and constitutes a MOS capacitor with the first semiconductor region. The second semiconductor region is arranged adjacent to the first semiconductor region on the semiconductor substrate, formed in the same conductive type as the first semiconductor region, and supplies a carrier to the first semiconductor region when the MOS capacitor is charged and discharged.

Semiconductor element and semiconductor device

Growing community of inventors

Kanagawa, Japan

Shintaro Okamoto