Hitachi, Ltd.

Shintaro Kudo

Yusuke Nonaka

Akira Deguchi

Norio Shimozono

Masanori Takada

Yuko Matsui

Yuki Sakashita

Akira Yamamoto

Masayuki Yamamoto

Kazuyoshi Serizawa

Katsuya Tanaka

Sadahiro Sugimoto

Tomohiro Yoshihara

Makio Mizuno

Noboru Morishita

Naoya Okada

Yoshihiro Yoshii

Akihiko Araki

Yoshifumi Mimata

Yusuke Nishihara

Provided is a storage system which is connected to a host computer and whereby data is read and written. The storage system comprises: a storage device which stores the data; and a storage controller wherein an error is detected by one of a plurality of first sections which are sections upon a transfer path of the data with respect to the storage device in a full check mode, an error is detected by one of second sections which are fewer than the first sections in a regular mode, and a switch is made to the full check mode when the error is detected in the regular mode.

Storage system and method for controlling same

In a storage system, first and second controllers have respective first and second buffer and cache areas. The first controller stores write data in accordance with a write request in the first cache area without involving the first buffer area and to transfer the stored write data to the second cache area without involving the second buffer area. The first controller is configured to determine which of the first and second cache areas is to be used as a copy source and to be used as a copy destination depending on whether the storing of the first write data in the first cache area had been successful or on whether the transfer of the write data from the first cache area to the second controller had been successful, and by copying data from the copy source to the copy destination, recovers data in an area related to a transfer failure.

Storage system and storage control method

A receiving controller which receives a read request out of first and second storage controllers transfers the read request to an associated controller which is associated with a read source storage area out of the first and second storage controllers when the receiving controller is not the associated controller. It is however the receiving controller that reads the read-target data from a read source storage device, writes the read-target data to a cache memory of the receiving controller, and transmits the read-target data written in the cache memory of the receiving controller to a host apparatus.

Storage system and cache control method

A storage controller has a processor, a volatile first cache memory that is coupled to the processor and that temporarily stores data, a nonvolatile second cache memory that is coupled to a microprocessor and that temporarily stores data, and a battery that is configured to supply electrical power to at least the processor and the first cache memory when a power stoppage has occurred. The second cache memory includes a dirty data area for storing dirty data, which is data that is not stored in the storage device, and a remaining area other than the dirty data area. When a power stoppage has occurred, the processor stores as target data in the remaining area of the second cache memory either all or a part of the data stored in the first cache memory.

Storage system

The present invention is a clustered storage system with which, even when access to the processor of another controller is sent from the processor of one controller, the processor of the second controller is able to prioritize processing of this access so that I/O processing is also prevented from being delayed. With the storage system of the present invention, the first processor of the first controller transmits request information which is to be processed by the second processor of the second controller to the second processor by differentiating between request information for which processing is to be prioritized by the second processor and request information for which processing is not to be prioritized, and the second processor acquires the request information by differentiating between request information for which processing is to be prioritized and request information for which processing is not to be prioritized.

Computer system and control method thereof

According to a storage system of a prior art adopting a cluster structure, various types of large-capacity memories were arranged to enhance the access performance, so that the system required a dedicated control circuit, and there was difficulty in realizing cost reduction and improvement of access performance simultaneously. In order to solve the problems, the present invention provides a storage system in which a group of memories is integrated to MPU memories directly coupled to MPUs in respective controller units, wherein each MPU memory is divided into a duplication information area and a non-duplication information area, and attribute information for controlling accesses thereto are provided. Further, each duplication information area is provided with a double master information area capable of referring to a first memory and a second memory and a single master information area capable of referring only to either the first memory or the second memory, and the accesses thereto are performed based on the attribute information.

Storage system and method for controlling memory in storage system

An exemplary storage apparatus of the invention includes storage devices for storing data of block I/O commands and file I/O commands and a controller including a block cache area and a file cache area. The controller creates block I/O commands from file I/O commands and accesses the storage devices in accordance with the created block I/O commands. In a case where the file cache area is lacking an area to cache first data of a received first file I/O command, the controller chooses one of a first cache method that newly creates a free area in the file cache area to cache the first data in the file cache area and a second cache method that caches the first data in the block cache area without caching the first data in the file cache area.

Storage apparatus and control method for storage apparatus

To raise the CPU cache hit rate and improve the I/O processing. Controller is CPU configured from a CPU core and a CPU cache wherein the CPU selects memory bus optimization execution processing or cache poisoning optimization execution processing according to an attribute of the access target volume on the basis of an access request. If the memory bus optimization execution processing is selected, CPU loads the target data into the CPU core after storing the target data in the main storage area, and if the cache poisoning optimization execution processing is selected, the CPU loads the target data into the CPU core after storing the target data in the temporary area of the CPU cache from the CPU memory, and the CPU core checks the target data which was loaded from the main storage area or the temporary area of the CPU cache.

Storage apparatus and data processing method

The storage apparatus includes a plurality of microprocessors; a plurality of storage areas formed in a drive group configured from a plurality of physical drives; and a management unit which manages microprocessors which handle data I/Os to/from one or more storage areas among the plurality of storage areas. The management unit detects variations in the processing loads of the plurality of microprocessors, generates load balancing target information which includes information on the storage areas to which the ownership is migrated, information on the migration-source microprocessor serving as the migration source of the ownership, and information on the migration-destination microprocessor serving as the migration destination of the ownership, and migrates the ownership to the storage areas with timing such that there is no drop in the processing load of the migration-destination microprocessor contained in the load balancing target information.

Storage apparatus and storage apparatus management method performing data I/O processing using a plurality of microprocessors

The present invention provides a storage system in which each microprocessor is able to execute synchronous processing and asynchronous processing in accordance with the operating status of the storage system. Any one attribute, from among multiple attributes (operating modes) prepared beforehand, is set in each microprocessor in accordance with the operating status of the storage system. The attribute that is set in each microprocessor is regularly reviewed and changed.

Storage system comprising multiple microprocessors and method for sharing processing in this storage system

According to a prior art storage subsystem, shared memories are mirrored in main memories of two processors providing redundancy. When the consistency of writing order of data is not ensured among mirrored shared memories, the processors must read only one of the mirrored shared memories to have the write order of the read data correspond among the two processors. As a result, upon reading data from the shared memories, it is necessary for a processor to read data from the main memory of the other processor, so that the overhead is increased compared to the case where the respective processors read their respective main memories. According to the storage subsystem of the present invention, a packet redirector having applied a non-transparent bridge enables to adopt a PCI Express multicast to the writing of data from the processor to the main memory, so that the order of writing data into the shared memories can be made consistent among the mirrored memories. As a result, data can be read from the shared memories speedily by accessing respective main memories in the respective processors.

Method for accessing mirrored shared memories and storage subsystem using method for accessing mirrored shared memories

The overall processing function of a storage apparatus is improved by suitably migrating ownership. The storage apparatus comprises a plurality of microprocessors; a plurality of storage areas formed in a drive group configured from a plurality of physical drives; and a management unit which manages, as the microprocessors which possess ownership to the storage areas, the microprocessors which handle data I/Os to/from one or more storage areas among the plurality of storage areas, wherein the management unit detects variations in the processing loads of the plurality of microprocessors, selects a migration-source microprocessor which migrates the ownership and a migration-destination microprocessor which is the ownership migration destination on the basis of variations in the processing load, and determines whether to migrate the ownership on the basis of information on a usage status of resources of each of the storage areas to which the migration-source microprocessor possesses ownership.

Storage apparatus and storage apparatus management method

A computer system having a plurality of controllers for data input/output control is provided, wherein even if a control authority of a processor is transferred to another processor and the computer system migrates control information necessary for a controller to execute data input/output processing, from a shared memory to a local memory for the relevant controller, the computer system prevents the occurrence of unbalanced allocation of a control function necessary for data input/output control between the plurality of controllers; and a load equalization method for such a computer system is also provided.

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Yokohama, Japan

Shintaro Kudo