Shinko Electric Industries Co., Ltd.

Shintaro Hayashi

Tetsuichiro Kasahara

Hirokazu Tsukioka

Kentaro Kaneko

Tsukasa Nakanishi

Konosuke Kobayashi

Hideki Matsuzawa

Hajime Koike

Misaki Imai

A coil structure includes layered metal plates, wherein each of the metal plates includes a lead wire portion having a partial-loop shape, end portion thick plate portions formed at both ends of the lead wire portion and thicker than the lead wire portion, and an inside thick plate portion formed with a thickness the same as the end portion thick plate portions, the inside thick plate portion being arranged inside a partial loop formed by the lead wire portion and being away from the lead wire portion, and wherein adjacent metal plates are bonded to each other at one of the end portion thick plate portions, the lead wire portions of the respective metal plates are connected in series to form a coil having a partial-loop shape, and the inside thick plate portions of the adjacent metal plates are bonded to each other to form a magnetic core.

Coil structure, lead frame, and inductor

A coil structure includes metal plates each including a spiral conductor, and a row of terminals, aligned in a predetermined direction on an outer side of the conductor, and formed by plate portions thicker than the conductor. Two ends of the conductor are connected to two adjacent plate portions for each metal plate. The row of terminals of a first metal plate is bonded to the row of terminals of a second, adjacent metal plate. The position where the two ends of the conductor connect to the two adjacent plate portions shifts one place toward the second end for each upward increase in level within a laminate along a laminated direction of the metal plates, so that the conductors of each of the metal plates are connected in series to form a spiral coil.

A lead frame includes a first area, situated on a first surface of the lead frame, for mounting a semiconductor chip, and a second area, situated on the first surface of the lead frame, around the first area, wherein the second area includes a roughened area and a less-rough area situated between the roughened area and the first area, the less-rough area having a higher flatness than the roughened area.

Lead frame and semiconductor device

A lead frame includes: a lead portion; a plating layer that is provided on a connected area of the lead portion, the connected area being an area connected with a semiconductor element; a recessed portion that is provided around the plating layer on the lead portion; and an oxidized layer that is provided on a surface including the recessed portion of the lead portion.

Lead frame, semiconductor device, and lead frame manufacturing method

A lead frame includes a lead portion having a first surface and a second surface, a connecting bar that has a first surface and a second surface and to which the lead portion is connected, and a raised portion provided on the first surface of the connecting bar. The first surface of the connecting bar is positioned between the first and the second surfaces of the lead portion. The tip of the raised portion is positioned between the first surface of the lead portion and the first surface of the connecting bar.

Lead frame and method of manufacturing lead frame

There is provided a lead frame. The lead frame includes: a die pad; a lead terminal that is separated from the die pad and disposed around the die pad; and a resin layer that is formed between the die pad and the lead terminal so as to fix the die pad and the lead terminal. The resin layer has an opening portion that exposes at least a lower surface of the lead terminal.

Lead frame and electronic component device

A semiconductor device includes a leadframe, a semiconductor chip mounted on the leadframe, and an encapsulation resin covering the leadframe and the semiconductor chip. The leadframe includes a terminal having a pillar shape. The terminal includes a first end surface, a second end surface facing away from the first end surface, and a side surface extending vertically between the first end surface and the second end surface. The side surface is stepped to form a step surface facing away from the second end surface and having an uneven surface part formed therein. A first portion of the terminal extending from the first end surface toward the second end surface and including the step surface is covered with the encapsulation resin. A second portion of the terminal extending from the first portion to the second end surface projects from the encapsulation resin.

Semiconductor device and leadframe

An electronic component device, includes: a lead frame including a terminal portion, the terminal portion including a columnar electrode and a metal plating layer, wherein the metal plating layer is formed on a lower surface of the electrode and a portion of a side surface of the electrode; an electronic component mounted on the lead frame to be electrically connected to the terminal portion; and a sealing resin that seals the lead frame and the electronic component, wherein another portion of the side surface of the electrode is embedded in the sealing resin and the metal plating layer is exposed from the sealing resin.

A semiconductor device includes a leadframe, a semiconductor chip, and an encapsulation resin encapsulating the leadframe and the semiconductor chip. The leadframe includes a first surface and a second surface facing away from the first surface. The semiconductor chip is mounted on the first surface of the leadframe. A part of the second surface of the leadframe is depressed toward the first surface to form a step surface. The step surface includes an uneven surface part where depressions are formed, and is covered with the encapsulation resin.

Leadframe and semiconductor device

A semiconductor device includes a lead frame; a semiconductor chip mounted on the lead frame; and an encapsulation resin, wherein a convexo-concave portion including a plurality of concave portions is provided at a covered portion of the lead frame that is covered by the encapsulation resin, wherein the planer shape of each of the concave portions is a circle, the diameter of which is greater than or equal to 0.020 mm and less than or equal to 0.060 mm, or a polygon, the diameter of whose circumcircle is greater than or equal to 0.020 mm and less than or equal to 0.060 mm, and wherein a ratio S/Sis greater than or equal to 1.7 where 'S' is a surface area of the convexo-concave portion that is formed at a flat surface whose surface area is 'S'.

A leadframe includes an individual region to become a semiconductor device, and an outer frame part supporting the individual region through its peripheral edge. The thickness of the outer frame part is greater than the thickness of the individual region.

Leadframe

A lead frame includes a die pad and a plurality of leads arranged around the die pad. Each of the leads includes an inner lead, a bent portion, and an external connection terminal. The inner lead includes a distal portion, adjacent to the die pad, and a connection end portion, located at an opposite end of the inner lead from the distal portion. The bent portion is connected to the connection end portion of the inner lead. The external connection terminal is connected by the bent portion to the connection end portion of the inner lead and located below the inner lead. The external connection terminal includes an upper surface that faces to and is parallel to a lower surface of the inner lead. The inner lead, the bent portion, and the external connection terminal are formed integrally in each of the leads.

Lead frame with anchor-shaped lead

A process for manufacturing an IC card includes a step of forming a plane coil by etching or punching a thin metal plate so that the plane coil consists of a conductor line wound as several loops in substantially the same plane and has respective terminals. A semiconductor element having electrodes is mounted on the plane coil. An adhesive agent or tape is attached to a predetermined area of the plane coil so that adjacent conductor lines in the loops are kept a predetermined gap therebetween. The plane coil is disposed between a pair of films to cover the plane coil therebetween, one of the films being provided with adhesive layer on a surface facing to the other film to seal the plane coil with the semiconductor element by attaching the pair of films with respect to each other by means of the adhesive layer.

Process for manufacturing IC card

A leadframe used for a leadless package (a semiconductor device) such as a quad flat non-leaded package (QFN) includes a die-pad portion disposed in a center of an opening defined by a frame portion, and a plurality of lead portions extending from the frame portion toward the die-pad portion in a comb shape. A lead width of a portion along a circumference of a region to be ultimately divided as a semiconductor device, of each of the lead portions, is formed narrower than that of the other portion of the corresponding lead portions. In the leadframe, a plurality of die-pad portions are disposed, the frame portion is provided so as to surround each of the die-pad portions, and a plurality of lead portions corresponding to each of the die-pad portions extend from the frame portion surrounding the corresponding die-pad portion toward the corresponding die-pad portion. Moreover, an adhesive tape is attached to one surface of the leadframe.

Growing community of inventors

Nagano, Japan

Shintaro Hayashi