Texas Instruments Corporation

Shintaro Aoyama

Tsuyoshi Tamaru

Ming J Hwang

Tadashi Terasaki

Keizo Hosoda

Robert Yung-Hsi Tsu

Toshio Ando

A method of reducing by-product deposition inside wafer processing equipment includes providing a chamber having a peripheral inner wall and placing a semiconductor wafer within the chamber. The method also includes placing a ring within the chamber proximate the peripheral inner wall and introducing a plurality of reactant gases into the chamber and reacting the gases. The method also includes introducing a heated gas into the chamber through the ring proximate the peripheral inner wall to increase the temperature of the peripheral inner wall.

Method for reducing by-product deposition in wafer processing equipment

A method of fabricating in-situ doped rough polycrystalline silicon in a single process in a single wafer reactor is disclosed. The method includes substantially simultaneously flowing SiH,, PH,, and H,in the single wafer reactor under predetermined temperature and pressure conditions and gas flow rates that result in nucleation and growth of a rugged polycrystalline silicon.

Method of fabricating in-situ doped rough polycrystalline silicon using a single wafer reactor

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Dallas, TX, United States of America

Shintaro Aoyama