Renesas Technology Corp.

Renesas Electronics Corporation

Hitachi Ulsi Systems Co., Ltd.

Other

Shinsuke Asari

Motoki Kanamori

Takayuki Tamura

Atsushi Shiraishi

Yasuhiro Nakamura

Atsushi Shikata

Kenji Kozakai

Chiaki Shinagawa

Satoshi Yoshida

Kunihiro Katayama

Shigemasa Shiota

Nagamasa Mizushima

Kenichi Ito

Yuki Mori

Shigeo Kurakata

Chiaki Kumahara

Makoto Obata

It is possible to prevent a central processing unit and a security processing unit from accessing of a non-volatile memory at the same time. A data flashincludes a secure areaand a user area. In the secure area, a plurality of pieces of security information used in a security process is stored. A security IPreads out a portion of the plurality of pieces of security information from the secure areaand stores it in the secure RAM. When the security information to be used in the security process is stored in the secure RAM, the security IPreads out the security information from the secure RAMand uses it.

Semiconductor device, security process execution device, and security process execution method

The service life of memory cards is to be substantially elongated against the occurrence of faulty blocks. A control logic searches blocks in a nonvolatile memory cell array for any acquired fault on the basis of a fault-inviting code in a management information section. If any faulty block is detected, the faulty block will be subjected to write/read comparison of data to judge whether or not the data in the block are normal. Any block determined to be normal will undergo rewriting of its fault-inviting code and registered as a normal block. Further, the registered block is stored into a write management table in the management area as a writable block. This enables an essentially normal block judged faulty on account of an erratic error or some other reason to be restored.

Memory apparatus which provides notification of memory capacity

A memory card has external interface terminals, an interface controller connected to each of the terminals, a rewritable nonvolatile memory connected to the interface controller, and a data processor connected to the interface controller. The interface controller can perform an operation based on another command supplied from the outside in parallel with the operations of transferring a command for a data process supplied from the outside to the data processor and operating it. The interface controller has plural buffers and, after completely inputting the command for a data process from an outside to a first buffer of the plural buffers, allows data related to the other command supplied from the outside to be inputted to a second buffer of the plural buffers. The memory card can receive a command data and data to be processed subsequently from the outside without the need of waiting for the completion of the communication process between the data processor and the interface controller.

Memory card

Memory card apparatus configured to provide notification of memory capacity

The invention intends to provide a memory card conforming to an HS-MMC mode in a standard of a multimedia card, while securing compatibility of both standards of the multimedia card and an SD card. In a normal MMC mode, the data is outputted at a fall edge of a clock signal. A frequency of the clock signal is about 20 MHz. When the data is outputted at the fall edge of the clock signal, data output is in time for a next clock signal. When a parameter '1' is set to a timing register provided in a host interface, the memory card is transitioned into the HS-MMC mode. In the HS-MMC mode, a clock signal frequency is increased to about 52 MHz. Here, the data is outputted at the rise edge of the clock signal, whereby the data output is brought in time for the rise edge of the next clock signal.

Memory card conforming to a multiple operation standards

A nonvolatile memory has plural memory blocks, each having a plurality of sub memory blocks, and is capable of programming to a first sub memory block within a first memory block and a second sub memory block within a second memory block in parallel. The first sub memory block has a management area for storing a management information including linking information between the first sub memory block corresponding sub memory blocks of other memory blocks. A control circuit controls reading the linking information from the first sub memory block in accordance with address information, and programming to the first sub memory block in accordance with the address information and corresponding sub memory blocks by the linking information.

Nonvolatile memory and method of address management

In a card storage device containing a non-volatile memory and a buffer memory, the buffer memory includes a plurality of banks. Data is transferred sequentially from a host CPU to the banks of the buffer memory, data is transferred to the non-volatile memory from a bank that becomes full, a write operation is started when one unit of data to be written into the non-volatile memory at a time has been transferred and, without waiting for the data to be written, the next write data is transferred from the host CPU to a bank from which write data has been transferred.

Non-volatile memory device and data storing method

A nonvolatile memory has an erase table in which a free-space information flag is associated with each physical address of a memory area and an address translation table in which a physical address of a memory area is associated with each logical address. The free-space information flag indicates whether a corresponding memory area is permitted to be erased. A control circuit determines a memory area to which rewrite data is to be written by referring to the free-space information flag, reflects the physical address and the logical address of the memory area to which the data is written into the address translation table, and updates the free-space information flag. The memory area to which rewrite data is to be written is determined by referring to the free-space information flag, and rewriting is not performed in the same memory area.

Nonvolatile memory card

Growing community of inventors

Akishima, Japan

Shinsuke Asari