Mitsubishi Denki Kabushiki Kaisha

Renesas Technology Corp.

Other

Renesas Electronics Corporation

Shinroku Maejima

Yuki Miyamoto

Shuji Nakao

Naohisa Tamada

Hidekazu Yamamoto

Atsushi Ueno

Makoto Kobayashi

Seiichiro Shirai

Kazuhito Matsukawa

Shigenori Yamashita

Takuya Matsushita

Toshihide Kawachi

Takahiro Machida

A method of manufacturing a semiconductor device answerable to refinement of circuits by correctly connecting adjacent small patterns with each other with excellent reproducibility in connective exposure and a semiconductor device manufactured by this method are proposed. According to this method of manufacturing a semiconductor device, connective exposure is performed by dividing a pattern formed on a semiconductor substrate into a plurality of patterns and exposing the plurality of divided patterns in a connective manner, by forming marks for adjusting arrangement of the patterns to be connected with each other on the semiconductor substrate before exposing patterns of a semiconductor element and connectively exposing the patterns of the semiconductor element in coincidence with the marks for adjusting arrangement.

Method of manufacturing semiconductor device, mask and semiconductor device

A photomask for focus monitoring of the present invention is provided with a substrate that allows the exposure light to pass through and a unit mask structure for focus monitoring. Unit mask structure for focus monitoring has two patterns, and that are formed on the surface of substrate and a light blocking film that has a rear surface pattern that is formed on the rear surface of substrate for substantially differentiating the incident directions of the exposure light that enters two patterns, and for position measurement. When the dimension of rear surface pattern is L and the wavelength of the exposure light is &#x3bb;, L/&#x3bb; is 10, or greater.

Method of focus monitoring and manufacturing method for an electronic device

There are provided a method and an apparatus for evaluating a wafer configuration which can accurately evaluate a peripheral portion of a wafer as compared with the conventional SFQR or the like, which comprises: measuring a configuration of a wafer at positions with a prescribed space within a surface of the wafer; providing a first region (W ) within the wafer surface for calculating a reference line or a reference plane from the measured wafer configuration; calculating a reference line ( ) or a reference plane ( ) in the first region (W ); providing a second region (W ) to be evaluated outside the first region; extrapolating the reference line ( ) or reference plane ( ) to the second region (W ); analyzing a difference between the configuration of the second region and the reference line or reference plane within the second region; and calculating the analyzed difference as surface characteristics.

Wafer shape evaluating method and device producing method, wafer and wafer selecting method

A focus monitoring method of the invention is characterized by transferring the pattern of a photo mask for phase shift focus monitor onto a photoresist on a semiconductor substrate by using modified illumination. Photo mask for phase shift focus monitor has first and second light transmitting portions which are adjacent to each other while sandwiching a shielding pattern, and is constructed so that a phase difference other than 180 degrees occurs between exposure light passed through the first light transmitting portion and exposure light passed through the second light transmitting portion. Consequently, a focus monitoring method, a focus monitor system, and a semiconductor fabricating method with high detection sensitivity in the z direction and which do not require changing of an illumination aperture can be achieved.

Focus monitoring method, focus monitoring system, and device fabricating method

A photomask for focus monitoring of the present invention is provided with a substrate that allows the exposure light to pass through and a unit mask structure for focus monitoring. Unit mask structure for focus monitoring has two patterns, and that are formed on the surface of substrate and a light blocking film that has a rear surface pattern that is formed on the rear surface of substrate for substantially differentiating the incident directions of the exposure light that enters two patterns, and for position measurement. When the dimension of rear surface pattern is L and the wavelength of the exposure light is &lgr;, L/&lgr; is 10, or greater.

Photomask for focus monitoring

The present invention provides a photomask, a semiconductor device, and a method for exposing through the photomask. The photomask comprises a photomask substrate, and an on-mask circuit area including an on-mask circuit pattern and an on-mask test mark area including an on-mask test pattern, both formed on the surface of the substrate, wherein the photomask substrate further includes an on-mask photolithography screening mark area including an on-mask comparison pattern and an on-mask screening pattern, the on-mask comparison pattern has substantially the same configuration as at least a part of the on-mask circuit pattern, and the on-mask screening pattern has substantially the same configuration as at least a part of the on-mask test pattern. The present invention allows it to measure the actual displacement generated from an overlaying (i.e. alignment) process for the purpose of eliminating of an the overlay displacement which can take place in a photolithography process.

Photomask, semiconductor device, and method for exposing through photomask

A semiconductor device having a registration accuracy measurement mark allows measurement in registration to be within an allowable measurement error even if there is a difference in height between a master pattern and a pattern of the registration accuracy measurement mark. The width of the second layer registration accuracy measurement mark pattern formed as a line is made larger than that of the second layer master pattern formed as a line by 0.85 &mgr;m to 1.0 &mgr;m. Accordingly, the difference in the amount of offset due to aberration upon transfer of the patterns between the second layer master pattern and the second layer registration accuracy measurement mark pattern can be within an allowable range in the overlay measurement. In addition, even if the second layer registration accuracy measurement mark pattern and the second layer master pattern are formed to have a difference in height (maximum 0.6 &mgr;m), the depth of focus (1.2 &mgr;m) is ensured.

Semiconductor device with registration accuracy measurement mark

On a semiconductor substrate, a registration measurement mark and intended patterns monitored by the registration measurement mark are provided. Step or level difference between the surface of registration measurement mark and the surface of intended patterns is made to be within .+-.0.2 .mu.m. By such structure, it becomes possible to accurately monitor the intended patterns by utilizing the registration measurement mark.

Growing community of inventors

Hyogo, Japan

Shinroku Maejima