Fujitsu Corporation

Shinpei Komatsu

Yumi Ishii

Hiroyuki Itoh

Tomohiro Hayashi

Shogo Shibazaki

Masaru Takehara

Yasushi Ito

Yoshihiro Takamatsuya

Takeshi Nagase

Masaki Kirinaka

Chika Kubono

Tatsushi Tobita

Data transferred from a host computer to a memory device is written into sectors whose addresses in a memory area are decoded by a decode table. Old data to be updated by the above data is erased or marked with erase flags. At a predetermined point of time, in order to create free areas, necessary data is evacuated to a primary memory media and unnecessary data indicated by erase flags is erased by a unit of predetermined memory size. Part of the memory media which has become defective is marked with a defect flag, and is replaced by an alternate area. In doing so, the decode table is rewritten to arrange the memory area.

Method of writing, erasing, and controlling memory for memory device

Data transferred from a host computer to a memory device is written into sectors whose addresses in a memory area are decoded by a decode tab. Old data to be updated by the above data is erased or marked with erase flags. At a predetermined point of time, in order to create free areas, necessary data is evacuated to a primary memory media and unnecessary data indicated by erase flags is erased by a unit of predetermined memory size. Part of the memory media which has become defective is marked with a defect flag, and is replaced by an alternate area. In doing so, the decode table is rewritten to rearrange the memory area.

Search speed in memory management of memory devices provided with a nonvolatile memory medium that is rewritable in each block which serves as the unit of data storage is improved by providing a free block table and a conversion table. The free block table stores data for each free block address number corresponding to a data-writable free block. The conversion table in the free block table converts externally designated address numbers into address data for blocks and sharing memory area. The conversion table is provided with block address data identification components that identify a block address as being empty or not.

Memory management device including a free block table and a conversion table with a free block address data identification component

A computer-aided logic circuit designing apparatus in which data on a plurality of circuits is stored in a database, the data on a plurality of circuits is read out therefrom and combined by a net list-RTL description combining section, a clock system portion is analyzed based on the logic circuit obtained by combining the data by a clock system analyzing section, and a result of the analysis is displayed by an analysis result display section correlating each type of clock system to a corresponding clock input element.

Computer-aided logic circuit designing apparatus computer-aided logic circuit designing system, and computer-aided logic circuit designing method

Data transferred from a host computer to a memory device is written into sectors whose addresses in a memory area are decoded by a decode table. Old data to be updated by the above data is erased or marked with erase flags. At a predetermined point of time, in order to create free areas, necessary data is evacuated to a primary memory media and unnecessary data indicated by erase flags is erased by a unit of predetermined memory size. Part of the memory media which has become defective is marked with a defect flag, and is replaced by an alternate area. In doing so, the decode table is rewritten to rearrange the memory area.

A semiconductor memory device has a memory space which includes blocks and each of the blocks includes sectors. The sectors have a data storing region and a flag region. Data stored in a sector is marked as valid or erased, depending on the flags in the flag region. If an even number of the flags in the flag region have a logical value of 1, the data is considered to be erased. The data in each sector may be erased and unerased a number of times, by sequentially altering the value of the flags in the flag region. Data stored in the memory may be erased on a sector-by-sector basis.

Method and apparatus for controlling data erase operations of a

Method of writing, erasing, and controlling memory and memory device

Simultaneously writing to and erasing two commonly numbered sectors

Method and apparatus for controlling the writing and erasing of

In a method of processing binary data by a computer to detect a state of the binary data, the first step is to perform an AND logic operation on the binary data and data obtained by subtracting binary one from the binary data. The second step is to repeatedly perform the AND logic operation on new binary data obtained by the AND logic operation executed in the first step and data obtained by subtracting binary one from the new binary data until a result of the AND logic operation executed in the second step becomes zero. The third step is to count the number of times that the second step has been repeatedly performed until the result of the AND logic operation becomes zero. The fourth step is to detect the state of the binary data on the basis of the number of times counted by the step c). The number of times counted by the third step indicates the number of bits indicating binary ones contained in the binary data.

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Yokohama, Japan

Shinpei Komatsu