Other

Renesas Technology Corp.

Renesas Semiconductor Engineering Corporation

Shinji Yamada

Teruhiko Funakura

Hisaya Mori

Takayuki Tsutsui

Yasuhiro Nunogawa

Kyoichi Takahashi

Masashi Maruyama

Hisayoshi Hanai

Masatoshi Maga

Takato Inoue

In a radio communication system, an electronic component for high frequency power amplifier carries out the detection of output level, required for feedback control of the output power of a high frequency power amplification circuit, by current detection. The electronic component has an error amplifier. The error amplifier compares an output level detection signal with an output level instruction signal, and generates a signal for controlling the gain of the high frequency power amplification circuit according to the difference between them. For the error amplifier, a low-pass amplification circuit is used. The amplification circuit is provided with, between its output terminal and its inverting input terminal, a phase compensation circuit. The phase compensation circuit comprises a resistance element, and another resistance element and a capacitive element in series connected in parallel with the resistance element.

Semiconductor integrated circuit for high frequency power amplifier, electronic component for high frequency power amplifier, and radio communication system

There is provided a high frequency power amplifier circuit capable of enhancing detection accuracy of an output level, necessary for feedback control of the high frequency power amplifier circuit, and capable of executing output power control with higher precision, With the high frequency power amplifier circuit, the detection of the output level, necessary for feedback control of the high frequency power amplifier circuit is executed by use of a current detection method, and in an electronic device comprising a differential amplifier for comparing an output power detection signal with an output level designation signal and for generating a signal for controlling a gain of the high frequency power amplifier circuit according to a potential difference between the two signals, a power source voltage with variation less than that for the power source voltage of the high frequency power amplifier circuit is used as the operational power source voltage of the output power detection circuit. Further, there is provided a capacitor across which an AC component is taken out from the output side of a power amplification transistor in the final amplification stage of the high frequency power amplifier circuit to be thereby impressed to the interior of the output power detection circuit.

High frequency power amplifier circuit and radio communication system

A test ancillary device with data memory and an analysis section is disposed in the vicinity of a test circuit board. The data memory is divided into two memory sections such that, when digital test data are stored in one memory section, the digital test data that have already been stored in the other memory section are loaded for analysis purpose.

Apparatus and method for testing semiconductor integrated circuit

There is provided an apparatus and method of testing a semiconductor integrated circuit, which apparatus and method enable testing of various semiconductor integrated circuits having different characteristics, fulfillment of the function of generating DAC data, and adaptation of various analog characteristic tests. An input range of a BOST device is switchable in accordance with the level of a DAC of a DUT, so that the test apparatus can handle DUTs of different types having different analog output levels.

Apparatus for testing semiconductor integrated circuit

There are provided a test apparatus and method for testing a semiconductor integrated circuit which enables improvements in the ease of operation and convenience of a BOST device and shortening of a test time. Numeric codes are assigned to tests. A test apparatus is equipped with memory and an analysis section. A test requirement table&mdash;in which hardware requirements required for conducting a test are set on a per-numeric-code basis&mdash;is stored in the memory. Test requirements corresponding to a numeric code are read from the memory, whereupon a test is performed. The analysis section analyzes a digital test output and sends the result of analysis to an external controller.

A test-assisting device (BOST device) is provided in the vicinity of a testing circuit board that transmits signals to and receive signals from a semiconductor integrated circuit to be tested, and the D/A converter circuit for testing, the A/D converter circuit for testing, the measured-data memory, and the analyzing portion of the test-assisting device are carried by separate circuit boards.

Tester for semiconductor integrated circuits

A BOST (built-off self-test) board has a connector, a substrate for use with a BOST board, and an external self-test circuit. The external self-test circuit has an ADC (analog-to-digital converter)/DAC (digital-to-analog converter) measurement section and a DSP (digital signal processor). In accordance with a control signal input by way of a specific terminal provided in a connector, the ADC/DAC measurement section transmits a predetermined test signal to the specific terminal provided in the connector. Further, in response to the test signal, the ADC/DAC measurement section receives a response signal input to the specific terminal provided in the connector. The DSP analysis section analyzes the response signal, thereby determining whether or not the response signal is an appropriate signal. Further, the DSP analysis section transmits, to the specific terminal provided in the connector, a test result signal indicating whether or not the response signal is appropriate.

External test auxiliary device to be used for testing semiconductor device

A semiconductor test apparatus includes an analog-to-digital converter for converting into a digital signal an analog output from a circuit under test; a test-apparatus-ADC-control-signal generation circuit for generating a control signal for the analog-to-digital converter in accordance with an activation signal entered from the outside; a measured data memory for storing, as measured data for each conversion, a signal output from the analog-to-digital converter; an address counter for generating an address signal for the measured data memory; a DAC counter for generating data to be input to the circuit under test; and a data write control circuit which produces, in response to a flag signal output from the analog-to-digital converter and representing that conversion is being performed, an update signal for the address counter, a memory write signal for the measured data memory, and an update signal for the DAC counter.

Semiconductor test apparatus, and method of testing semiconductor device

To provide a tester for semiconductor integrated circuits that can test an A/D converter circuit and a D/A converter circuit in a mixed signal type semiconductor integrated circuit comprising an A/D converter circuit and a D/A converter circuit at high accuracy and at high speed. A test assisting device is provided in the vicinity of a testing circuit board on which a semiconductor integrated circuit to be tested is mounted. The test assisting device comprises a data circuit to supply analog test signals to the A/D converter circuit of the semiconductor integrated circuit to be tested, and digital test signals to the D/A converter circuit thereof, a measured data memory to store test outputs from the semiconductor integrated circuit to be tested, and an analyzer portion to analyze data stored in the measured data memory.

Tester for semiconductor integrated circuits and method for testing semiconductor integrated circuits

In a threshold analysis method obtaining threshold voltages of all bits in a flash memory through single processing, fail bit map information is examined in order from a smaller voltage applied to the flash memory. As to a bit exhibiting a value, read from the flash memory, first mismatching a determination value, the threshold voltage is settled on the basis of a voltage applied when the bit fails in reading.

Threshold analysis system capable of deciding all threshold voltages included in memory device through single processing

There are provided a test apparatus and a test method for testing a semiconductor integrated circuit which facilitate control of a BOST device and improve the versatility of the BOST device. There is provided an interface for exchanging signals between a BOST device and an external controller. A test control signal and a test result analysis signal are exchanged by means of the interface, thus effecting a test and analysis of the test.

A memory tester including an algorithmic pattern generator (ALPG) for generating a test pattern as a digital signal based on vector data is provided with a digital-to-analog converter built in the memory tester or provided outside the memory tester. Thus, the function of a device under test (DUT) having the analog-to-digital converting function can be verified. In other words, an address signal included in the test pattern generated in the ALPG is used for generating an analog signal to be input to the DUT having the analog-to-digital converting function, not for address designation. A control unit compares an output digital signal generated in the DUT with the address signal generated in the ALPG as a test digital signal to detect the degree of agreement between these signals, thereby verifying the analog-to-digital converting function of the DUT. Consequently, a test system and a testing method capable of testing the analog-to-digital or digital-to-analog converting function of the DUT using the memory tester are obtained.

Test system and testing method using memory tester

An external test ancillary device (BOST device) analyzes measured information output from a semiconductor integrated circuit and transmits a result of analysis to a semiconductor test apparatus. The external test ancillary device includes a DAC counter for generating input data; a digital-to-analog converter for converting the data output from the counter from a digital signal into an analog signal; an analog-to-digital converter which receives data output from the digital-to-analog converter by way of a loopback line and converts the data from an analog signal into a digital signal; a DSP analysis section for performing self-diagnostic operation on the basis of data output from the analog-to-digital converter; measured data memory, an address counter, and a data write control circuit.

Growing community of inventors

Hyogo, Japan

Shinji Yamada