Sharp Kabushiki Kaisha Corporation

Enplas Corporation

Shinji Suminoe

Toshiya Ishio

Hiroyuki Nakanishi

Katsunobu Mori

Yoshihide Iwazaki

Nobuo Ogata

Mitsuru Hineno

Tomohiko Yamamoto

Naoto Inoue

Kenji Toyosawa

Koji Sakai

Akira Tomiyoshi

Masato Onoue

Yasuaki Isobe

Daisuke Takeda

Kohji Itoh

Takamasa Tanaka

A surface light-emitting unit of the present invention is an LED module () for emitting light from an LED chip () of a light-emitting element part () via a light flux control section () of a light flux control part (), the light flux control section () being fixed by a plurality of columnar sections () above a fixing surface of a substrate () on which fixing surface the light-emitting element part ()is fixed. This provides an appropriate gap between the light-emitting element part () and the light flux control section () for heat release.

Surface light-emitting unit and display device provided with the same

A backlight unit comprising: a light guide plate for causing light to exit in a planar manner from an upper surface of the light guide plate, the light having entered the light guide plate from an LED; a substrate provided along an end surface of the light guide plate and having an LED mounted on a counter surface of the substrate, the counter surface facing the end surface of the light guide plate; a frame provided along the substrate and attached to the substrate on a rear surface of the substrate, the rear surface being opposite to the counter surface; and one or a plurality of insulating members arranged in such a manner that the one or the plurality of insulating members and the frame sandwich the substrate, the one or the plurality of insulating members each fixing a screw point of a screw inserted from the frame into a through-hole provided through the frame and the substrate.

Backlight unit and liquid crystal display device

A surface-emission unit to prevent irregularity in brightness from being generated is provided. The surface-emission unit is composed of light-emission element parts each having a light-emission element, aligned and arranged on a substrate two-dimensionally, and optical lenses each arranged on the substrate with respect to each light-emission element part, to diffuse light from the light-emission element, and a support part to fix the optical lens onto the substrate is arranged so as not overlap a line connecting the light-emission element part corresponding to the optical lens fixed by the support part, to another light-emission element part adjacent to the light-emission element part.

Surface-emission unit and method for producing the same

An illumination device includes an LED package, an LED driver including an FET, and a thermistor disposed on a substrate. A plurality of such LED packages are disposed on the substrate such that a first area and a second area, each determined by vertices corresponding to LED packages, are defined on the substrate. The thermistor is disposed in the first area, and the FET is disposed in the second area, which is outside of the first area. The thermistor detects a temperature in the first area. Such a configuration allows the thermistor to detect, in accordance with the temperature in the area, the temperature of heat transferred from the LED packages, without being affected by heat generated by the FET. This makes it possible to efficiently make temperature corrections to stabilize color temperature and luminance.

Illumination device and liquid crystal display device

A semiconductor device () includes: a substrate (), including an electrode pad (); an IC chip (), mounted on the substrate (); and an externally connecting terminal (), formed on the electrode pad () and electrically connected with the IC chip (), the externally connecting terminal () including a resin core () made of an elastic material and including a metal layer () formed outside the resin core (), thereby providing a semiconductor device having high packaging reliability.

Semiconductor device

A manufacturing method of a semiconductor device, comprising the steps of forming an insulation layer, which has an opening section in an area including an area on an electrode pad, on a top surface of the semiconductor substrate on which the electrode pad is formed; at least forming a first barrier metal layer, which becomes a part of a leading wiring layer, in an inner peripheral surface of the opening section including the top surface of the electrode pad; at least forming a main conductor layer, which becomes a part of the leading wiring layer, in an area surrounded by the first barrier metal layer in the opening section; eliminating an upper portion of the main conductor layer at least to a position at which the first barrier metal layer is exposed, and forming a second barrier metal layer, which becomes a part of the leading wiring layer, so as to cover the whole top surface of the main conductor layer.

Semiconductor device having a leading wiring layer

A leading wiring layer is provided with a main conductor layer, a first barrier metal layer for covering bottom and side surfaces of the main conductor layer, and a second barrier metal layer for covering a top surface of the main conductor layer. This ensures the respective barrier metal layers to cover entire surroundings including the side, bottom and top surfaces of the main conductor layer.

A semiconductor chip of the present invention is so arranged that a front face on which an element circuit is formed has electrode pads and a side face and a back face are coated with a shielding layer for shielding electromagnetic waves. With this, it is possible to provide a semiconductor element capable of being easily manufactured into a smaller semiconductor device compared with a conventional semiconductor device equipped with a shielding cap; a semiconductor device; and a method for manufacturing a semiconductor element.

Semiconductor element with electromagnetic shielding layer on back/side face(s) thereof

A manufacturing method of a semiconductor device for providing wires on a front surface of a semiconductor wafer by providing a plating layer, in which conductive layers provided on the front and back surfaces of the semiconductor wafer are electrically conducted by solder filled in its through-holes, and electrolytic plating is carried out by electrically connecting cathode terminals of an electrolytic plating apparatus and the conductive layer provided on the back surface of the semiconductor wafer which is provided with a mask on the conductive layer provided on its front surface.

Manufacturing method of semiconductor device

A semiconductor integrated circuit device in accordance with the present invention is provided with first electrode pads, a first insulation layer and a second insulation layer. The first electrode pad are formed on the circuit formation face side of an IC chip. The first insulation layer is placed on areas other than the upper portions of the first electrode pads. The second insulation layer, which is made from a photosensitive material, is formed on the first insulation layer with an opening section for allowing at least one portion of the first electrode, the wire and at least one portion of the second electrode to be exposed. Here, the wire and the second electrode are formed by filling the opening section of the second insulation layer with particles of a conductive material. Thus, it is possible to provide a semiconductor integrated circuit device to which a fine wire processing technique is applied while maintaining the same functions as conventional devices at low costs, and a manufacturing method for such a device.

Semiconductor integrated circuit device and manufacturing method thereof

An inner lead and an outer lead are formed only on an insulating tape. A semiconductor chip and the inner lead are connected by the flip chip method by providing an anisotropic conductive material therebetween. A radiating plate is bonded to the insulating tape with use of an adhesive so that the radiating plate covers all regions where solder balls connected with the outer leads are formed. Unlike the TAB type, the inner lead is not uncovered with the insulating tape, whereby deformation of the inner lead is suppressed as much as possible. With this arrangement, the following effect can be achieved. Namely, in a semiconductor device of the BGA type, heat generated during package manufacture can be efficiently emitted, and hence package defects caused by heat and stress during manufacture can be suppressed. As a result, smaller and thinner packages can be manufactured, while pitch narrowing and multiple-port structure can be achieved.

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Tenri, Japan

Shinji Suminoe